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Dr. SD Jayavathi
Dr. SD Jayavathi
Professor & head/ECE, JP college of Engineering
Verified email at jpcollege.org
Title
Cited by
Cited by
Year
FPGA implementation of MQ coder in JPEG 2000 standard—A review
AS SD Jayavathi
International Journal of Innovation and Scientific Research 28 (1), 76-83, 2016
52016
FPGA-based Auxiliary Minutest MQ-coder architecture of JPEG2000
SD Jayavathi, A Shenbagavalli
Journal of Real-Time Image Processing 16 (5), 1765-1779, 2019
32019
Compression of hyperspectral images using PCA with lifting transform
SDJ M Mahendran
proceedings of International Conference on Emerging Engineering Trends and …, 2016
32016
Efficient hardware architecture for integer implementation of multi-alphabet arithmetic coding for data mining
SD Jayavathi, A Shenbagavalli, BG Ram
International Journal of Business Intelligence and Data Mining 13 (1-3), 188-208, 2018
12018
VLSI Implementation of Error Correction Unit for TCM Decoders
SDJ S. Satyabama
Int.Journal of Information and Communication Technologies 6 (3-4), 601-607., 2013
2013
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