Susmita Sur-Kolay

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Bhargab B. BhattacharyaDistinguished Visiting Professor (CSE), Indian Institute of Technology KharagpurVerified email at isical.ac.in
Amlan ChakrabartiProfessor and Director, A.K.Choudhury School of Information Technology, University ofVerified email at ieee.org
Niraj JhaProfessor of Electrical and Computer Engineering,Princeton UniversityVerified email at princeton.edu
Anand RaghunathanProfessor of Electrical and Computer Engineering, Purdue UniversityVerified email at purdue.edu
Sandip KunduUniversity of MassachusettsVerified email at ecs.umass.edu
Sudhindu MandalSister Nivedita UniversityVerified email at snuniv.ac.in
Mehran Mozaffari KermaniAssociate Professor of Computer Engineering at University of South FloridaVerified email at usf.edu
Subhasis BhattacharjeeIIT JammuVerified email at iitjammu.ac.in
Chittaranjan MandalDept of Computer Sc & Engg, IIT KharagpurVerified email at iitkgp.ac.in
Steven DerrienUniversité de Rennes 1Verified email at irisa.fr
Sanjay RajopadhyeColorado State UniversityVerified email at colostate.edu
Abhik RoychoudhuryProfessor of Computer Science, National University of SingaporeVerified email at comp.nus.edu.sg
Gautam DasDistinguished University Chair Professor, CSE Dept, University of Texas at ArlingtonVerified email at uta.edu
Minati DeIndian Institute of Technology DelhiVerified email at maths.iitd.ac.in
Sanghamitra BandyopadhyayProfessor of Computer Science, Indian Statistical Institute, Kolkata, IndiaVerified email at isical.ac.in
CA MurthyProfessor, Machine Intelligence Unit, Indian Statistical Institute, IndiaVerified email at isical.ac.in
Ansuman BanerjeeProfessor, Indian Statistical InstituteVerified email at isical.ac.in
Koushik SinhaSouthern Illinois University, CarbondaleVerified email at cs.siu.edu
Prasenjit BasuSamsung Research Institute, BangaloreVerified email at samsung.com
Sandeep Kumar DeySynopsysVerified email at synopsys.com

Susmita Sur-Kolay

Professor of Computer Science

Verified email at isical.ac.in - Homepage

Electronic design automation Algorithms


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Systematic poisoning attacks on and defenses for machine learning in healthcare M Mozaffari-Kermani, S Sur-Kolay, A Raghunathan, NK Jha IEEE journal of biomedical and health informatics 19 (6), 1893-1905, 2014	233	2014
Wearable medical sensor-based system design: A survey A Mosenia, S Sur-Kolay, A Raghunathan, NK Jha IEEE Transactions on Multi-Scale Computing Systems 3 (2), 124-138, 2017	133	2017
Energy-efficient long-term continuous personal health monitoring AM Nia, M Mozaffari-Kermani, S Sur-Kolay, A Raghunathan, NK Jha IEEE Transactions on Multi-Scale Computing Systems 1 (2), 85-98, 2015	122	2015
A modeling approach for addressing power supply switching noise related failures of integrated circuits C Tirumurti, S Kundu, S Sur-Kolay, YS Chang Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004	97	2004
CABA: Continuous authentication based on BioAura A Mosenia, S Sur-Kolay, A Raghunathan, NK Jha IEEE Transactions on Computers 66 (5), 759-772, 2016	71	2016
Routing of L-shaped channels, switchboxes and staircases in manhattan-diagonal model S Das, S Sur-Kolay, BB Bhattacharya Proceedings Eleventh International Conference on VLSI Design, 65-70, 1998	69	1998
PAQCS: Physical design-aware fault-tolerant quantum circuit synthesis CC Lin, S Sur-Kolay, NK Jha IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (7 …, 2014	67	2014
Physiological information leakage: A new frontier in health information security AM Nia, S Sur-Kolay, A Raghunathan, NK Jha IEEE Transactions on Emerging Topics in Computing 4 (3), 321-334, 2015	59	2015
Linear nearest neighbor synthesis of reversible circuits by graph partitioning A Chakrabarti, S Sur-Kolay, A Chaudhury arXiv preprint arXiv:1112.0564, 2011	59	2011
Floorplanning for partially reconfigurable FPGAs P Banerjee, M Sangtani, S Sur-Kolay IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010	58	2010
Secure public verification of IP marks in FPGA design through a zero-knowledge protocol D Saha, S Sur-Kolay IEEE transactions on very large scale integration (VLSI) systems 20 (10 …, 2011	43	2011
Nearest Neighbour based Synthesis of Quantum Boolean Circuits. A Chakrabarti, S Sur-Kolay Eng. Lett. 15 (2), 356-361, 2007	42	2007
Synthesis techniques for ternary quantum logic SB Mandal, A Chakrabarti, S Sur-Kolay 2011 41st IEEE International Symposium on Multiple-Valued Logic, 218-223, 2011	32	2011
Fast unified floorplan topology generation and sizing on heterogeneous FPGAs P Banerjee, S Sur-Kolay, A Bishnu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009	29	2009
Fundamentals of IP and SoC security S Bhunia, S Ray, S Sur-Kolay Springer, 2017	28	2017
SoC: a real platform for IP reuse, IP infringement, and IP protection D Saha, S Sur-Kolay VLSI Design 2011, 1-10, 2011	27	2011
The cycle structure of channel graphs in nonsliceable floorplans and a unified algorithm for feasible routing order S Sur-Kolay, BB Bhattacharya 1991 IEEE International Conference on Computer Design: VLSI in Computers and …, 1991	27	1991
Combined instruction and loop parallelism in array synthesis for FPGAs S Derrien, S Rajopadhye, SS Kolay Proceedings of the 14th international symposium on Systems Synthesis, 165-170, 2001	26	2001
Fast FPGA placement using space-filling curve P Banerjee, S Bhattacharjee, S Sur-Kolay, S Das, SC Nandy International Conference on Field Programmable Logic and Applications, 2005 …, 2005	23	2005
Fast robust intellectual property protection for VLSI physical design D Saha, S Sur-Kolay 10th International Conference on Information Technology (ICIT 2007), 1-6, 2007	21	2007

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