A high speed and area efficient Booth recoded Wallace tree multiplier for fast arithmetic circuits MJ Rao, S Dubey 2012 Asia Pacific conference on postgraduate research in microelectronics …, 2012 | 80 | 2012 |
A High Speed Wallace Tree Multiplier Using Modified Booth Algorithm for Fast Arithmetic Circuits J Rao M, S Dubey IOSR Journal of Electronics and Communication Engineering 3 (1), 7-11, 2012 | 30 | 2012 |
Design & simulation of solar DC pump in simulink PB Narayana, P Motepalli, BRS Reddy, S Dubey 2013 International Conference on Energy Efficient Technologies for …, 2013 | 29 | 2013 |
Person follower robotic system D Sanjay, TS Savithri, PR Kumar 2014 International Conference on Control, Instrumentation, Communication and …, 2014 | 13 | 2014 |
An FPGA based service Robot for floor cleaning with autonomous navigation S Dubey, MC Chinnaaiah, CS Kiran, BS Priyanka, PP Rao 2016 International Conference on Research Advances in Integrated Navigation …, 2016 | 12 | 2016 |
ASIC design of signed and unsigned multipliers using compressors R Abhilash, S Dubey, MC Chinnaiah 2016 International Conference on Microelectronics, Computing and …, 2016 | 12 | 2016 |
An unveiling path planning algorithm with minimal sensing using embedded based robots MC Chinnaiah, S Dubey, L Vineela, K Bindu, EB Babu 2016 International Conference on Advances in Human Machine Interaction (HMI …, 2016 | 11 | 2016 |
A Novel approach and Implementation of Robot path planning using Parallel processing algorithm MC Chinnaiah, D Sanjay, PR Kumar, TS Savithn 2012 International Conference on Communications, Devices and Intelligent …, 2012 | 11 | 2012 |
FPGA based robots hardware efficient scheme for Real time indoor environment with behavioural control MC Chinnaaiah, S Ambati, M Yaddla, J Sravanthi, D Sanjay 2015 International Conference on Innovations in Information, Embedded and …, 2015 | 9 | 2015 |
A survey of reconfigurable service robots D Sanjay, MC Chinnaiah, TS Savithri, PR Kumar 2016 International Conference on Research Advances in Integrated Navigation …, 2016 | 8 | 2016 |
Notice of Retraction High performance and area efficient Signed Baugh-Wooley multiplier with Wallace tree using compressors R Abhilash, S Dubey, MC Chinnaaiah 2015 International Conference on Electrical, Electronics, Signals …, 2015 | 7 | 2015 |
Real–time yoga activity with assistance of embedded based smart yoga mat M Anusha, S Dubey, PS Raju, IA Pasha 2019 2nd International Conference on Innovations in Electronics, Signal …, 2019 | 6 | 2019 |
Overspeeding and rash driving vehicle detection system VP Kumar, K Rajesh, M Ganesh, IRP Kumar, S Dubey 2014 Texas Instruments India Educators' Conference (TIIEC), 25-28, 2014 | 6 | 2014 |
A versatile autonomous navigation algorithm for smart indoor environment using FPGA based robot MC Chinnaaiah, S Dubey, K Anusha, PR Kumar, TS Savithri 2017 International Conference on Intelligent Computing, Instrumentation and …, 2017 | 5 | 2017 |
A versatile path planning algorithm with behavioural control using FPGA based robots MC Chinnaiah, S Dubey, K Anusha, J Vani, GD Vani 2016 10th International Conference on Intelligent Systems and Control (ISCO …, 2016 | 5 | 2016 |
A Review: Traditionally Used Medicinal Plants Of Family Arecaceae With Phytoconstituents And Therapeutic Applications A Shukla, S Dubey Int. J. boil. Pharm. Allied sci 11 (12), 5864-5877, 2022 | 4 | 2022 |
Implementation of mobile robot navigation mechanism using fpga: an edge detection-based approach K Vennela, MC Chinnaaiah, S Dubey, S Savithri International Conference on Innovative Computing and Communications …, 2019 | 4 | 2019 |
A new deliberation of embedded based assistive system for Yoga MC Chinnaiah, TPK Nandan, P Haritha, S Dubey, IA Pasha 2018 8th International Symposium on Embedded Computing and System Design …, 2018 | 4 | 2018 |
Deliberation of curvature type Obstacles: A new approach using FPGA based robot MC Chinnaaiah, K Anusha, B Bharat, M Divya, PS Raju, S Dubey 2018 International Conference on Control, Power, Communication and Computing …, 2018 | 3 | 2018 |
Asic design of low power VLSI architecture for different multiplier algorithms using compressors SDMCC R. Abhilash 11th International Conference on Industrial and Information Systems (ICIIS …, 2016 | 3 | 2016 |