| An efficient VLSI architecture of a reconfigurable pulse-shaping FIR interpolation I Hatai, I Chakrabarti, S Banerjee IEEE Transactions on very large scale integration (VLSI) systems 23 (6 …, 2014 | 50 | 2014 |
| An efficient constant multiplier architecture based on vertical-horizontal binary common sub-expression elimination algorithm for reconfigurable FIR filter synthesis I Hatai, I Chakrabarti, S Banerjee IEEE Transactions on Circuits and Systems I: Regular Papers 62 (4), 1071-1080, 2015 | 44 | 2015 |
| FPGA implementation of a digital FM modem I Hatai, I Chakrabarti 2009 International Conference on Information and Multimedia Technology, 475-479, 2009 | 33 | 2009 |
| A new high-performance digital FM modulator and demodulator for software-defined radio and its FPGA implementation I Hatai, I Chakrabarti International Journal of Reconfigurable Computing 2011, 2-2, 2011 | 32 | 2011 |
| A computationally efficient reconfigurable constant multiplication architecture based on CSD decoded Vertical–Horizontal common sub-expression elimination algorithm I Hatai, I Chakrabarti, S Banerjee IEEE Transactions on Circuits and Systems I: Regular Papers 65 (1), 130-140, 2017 | 17 | 2017 |
| Reconfigurable architecture of a RRC FIR interpolator for multi-standard digital up converter I Hatai, I Chakrabarti, S Banerjee 2013 IEEE International Symposium on Parallel & Distributed Processing …, 2013 | 17 | 2013 |
| FPGA implementation of a fetal heart rate measuring system I Hatai, I Chakrabarti, S Banerjee 2013 2nd International Conference on Advances in Electrical Engineering …, 2013 | 13 | 2013 |
| A high-speed, ROM-less DDFS for software defined radio system I Hatai, I Chakrabarti 2010 INTERNATIONAL CONFERENCE ON COMMUNICATION CONTROL AND COMPUTING …, 2010 | 8 | 2010 |
| ASIC implementation of a 512-point FFT/IFFT processor for 2D CT image reconstruction algorithm I Hatai, R Biswas, S Banerjee IEEE Technology Students' Symposium, 220-225, 2011 | 6 | 2011 |
| A novel low-latency, high-speed DDFS architecture I Hatai, I Chakrabarti 2010 Annual IEEE India Conference (INDICON), 1-4, 2010 | 4 | 2010 |
| Parameter controlled reconfigurable baseband modulator for SDR architecture I Hatai, I Chakrabarti 2010 2nd International Conference on Mechanical and Electronics Engineering …, 2010 | 3 | 2010 |
| A Reconfigurable Gaussian Base Normalization Deep Neural Network Design for an Energy-Efficient Voice Activity Detector A Samanta, I Hatai, AK Mal 2021 2nd International Conference on Communication, Computing and Industry 4 …, 2021 | 2 | 2021 |
| Multi-standard programmable baseband modulator for next generation wireless communication I Hatai, I Chakrabarti arXiv preprint arXiv:1009.6132, 2010 | 2 | 2010 |
| Design an Efficient FPGA Based Hardware Implementation for Real-Time Mobile Epileptic Seizure Prediction Using Deep Neural Network ANU SAMANTA, I Hatai, AK Mal | 1 | 2023 |
| A Reconfigurable digital up converter architecture and its hardware Implementation for Software Defined Radio System I Hatai IIT, Kharagpur, 2017 | 1 | 2017 |
| Programmable Common Baseband Modulator for Software Defined Radio system I Hatai, I Chakrabarti International Journal of Signal and Imaging Systems Engineering 4 (3), 142-152, 2011 | 1 | 2011 |
| Architectural design of a Radix-4 CORDIC-based Radix-4 IFFT algorithm and its FPGA implementation K Bhattacharyya, A Hazra, I Hatai, S Banerjee International Journal of Signal and Imaging Systems Engineering 2 (4), 201-215, 2009 | 1 | 2009 |
| An energy-efficient voice activity detector using reconfigurable Gaussian base normalization deep neural network A Samanta, I Hatai, AK Mal Multimedia Tools and Applications 82 (18), 27861-27882, 2023 | | 2023 |
| Analytical Model of a Multi-Resolution Sample rate re-configurable Decimator for SDADC A Mondal, S Bhar, S Srimani, I Hatai, K Ghosh, H Rahaman 2019 IEEE Region 10 Symposium (TENSYMP), 588-592, 2019 | | 2019 |
| A low power driver amplifier for Fully Differential ADC S Bhar, A Mondal, S Srimani, I Hatai, S Das, K Ghosh, H Rahaman 2019 2nd International Symposium on Devices, Circuits and Systems (ISDCS), 1-6, 2019 | | 2019 |
Indrajit ChakrabartiProfessor, Dept. of Electronics and Electrical Communication Engineering, IIT KharagpurVerified email at ece.iitkgp.ernet.in
