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M. W. Akram
M. W. Akram
Dept. of ECE, Jamia Millia Islamia, New Delhi
Verified email at jmi.ac.in
Title
Cited by
Cited by
Year
Junctionless tunnel field effect transistor
B Ghosh, MW Akram
IEEE electron device letters 34 (5), 584-586, 2013
3232013
Performance estimation of sub-30 nm junctionless tunnel FET (JLTFET)
P Bal, MW Akram, P Mondal, B Ghosh
Journal of Computational Electronics 12, 782-789, 2013
672013
Dual material gate junctionless tunnel field effect transistor
P Bal, B Ghosh, P Mondal, MW Akram, BMM Tripathi
Journal of Computational Electronics 13, 230-234, 2014
392014
Hetero-gate-dielectric double gate junctionless transistor (HGJLT) with reduced band-to-band tunnelling effects in subthreshold regime
B Ghosh, P Mondal, MW Akram, P Bal, AK Salimath
Journal of Semiconductors 35 (6), 064001, 2014
322014
Effects of non-uniform doping on junctionless transistor
P Mondal, B Ghosh, P Bal, MW Akram, A Salimath
Applied Physics A 119, 127-132, 2015
282015
Impact of asymmetric dual-k spacers on tunnel field effect transistors
MJS Mohd Adil Raushan, Naushad Alam, Mohd Waseem Akram
Journal of Computational Electronics 17 (na), 756–765, 2018
212018
Analog performance of double gate junctionless tunnel field effect transistor
MW Akram, B Ghosh
Journal of Semiconductors 35 (7), 074001, 2014
212014
Variability immune finFET-based full adder design in subthreshold region
A Islam, MW Akram, M Hasan
2011 International Conference on Devices and Communications (ICDeCom), 1-5, 2011
202011
An efficient quantum-dot cellular automata multi-bit adder design using 5-input majority gate
B Ghosh, A Agarwal, MW Akram
Quantum Matter 3 (5), 448-453, 2014
182014
A laterally graded junctionless transistor
P Bal, B Ghosh, P Mondal, MW Akram
Journal of Semiconductors 35 (3), 034003, 2014
162014
Energy efficient and process tolerant full adder design in near threshold region using finfet
A Islam, MW Akram, A Imran, M Hasan
2010 International Symposium on Electronic System Design, 56-60, 2010
152010
A comparative study of SELBOX-JLT and SOI-JLT
U Khan, B Ghosh, MW Akram, A Salimath
Applied Physics A 117, 2281-2288, 2014
142014
Design and analysis of robust dual threshold CMOS full adder circuit in 32nm technology
A Islam, MW Akram, SD Pable, M Hasan
2010 International Conference on Advances in Recent Technologies in …, 2010
142010
P-type double gate junctionless tunnel field effect transistor
MW Akram, B Ghosh, P Bal, P Mondal
Journal of Semiconductors 35 (1), 014002, 2014
122014
Energy efficient and process tolerant full adder in technologies beyond cmos
A Islam, MW Akram, M Hasan
International Journal on Communication 2 (2), 2011
82011
Realization of resistorless floating inductor using modified CDTA
D Prasad, Z Haseeb, P Mainuddin, MW Akram
Indian Journal of Pure & Applied Physics (IJPAP) 57 (1), 29-32, 2019
72019
Current mode fractional order filters using VDTAs with Grounded capacitors
D Prasad, M Kumar, MW Akram
International Journal of Electronics and Telecommunications, 11-17-11-17, 2019
62019
Spin relaxation in silicon nanowires
A Kumar, M Akram, SG Dinda, B Ghosh
Journal of Computational and Theoretical Nanoscience 9 (12), 2068-2073, 2012
62012
Design of High Frequency Low Power CMOS Dual-Output Current Conveyor at 32nm technology node
A Imran, M Hasan, MW Akram
2010 International conference on advances in recent technologies in …, 2010
62010
Investigation of statistical variability in non-uniformly doped bulk junctionless FinFET
DK Singh, P Mondal, MW Akram
Materials Science in Semiconductor Processing 113, 105041, 2020
52020
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