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Sathishkumar M
Sathishkumar M
Assistant Professor (Senior Grade), National Engineering College
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Cited by
Cited by
Year
Performance evaluation of gate engineered InAs–Si heterojunction surrounding gate TFET
M Sathishkumar, TSA Samuel, K Ramkumar, IV Anand, SB Rahi
Superlattices and Microstructures 162, 107099, 2022
192022
A detailed review on heterojunction tunnel field effect transistors
M Sathishkumar, TSA Samuel, P Vimala
2020 International Conference on Emerging Trends in Information Technology …, 2020
62020
Performance analysis of HfO2-SiO2 stacked oxide quadruple gate tunnel field effect transistor for improved ON current. Silicon
M Sathishkumar, TSA Samuel, P Vimala, D Nirmal
3*2021
Design ff Low Power Multiplier Unit using Wallace Tree Algorithm
R Krishnaveni, B Sivaranjani, PS Priya, M Sathishkumar, IV Anand
22020
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