| A probabilistic compute fabric based on coupled ring oscillators for solving combinatorial optimization problems I Ahmed, PW Chiu, W Moy, CH Kim IEEE Journal of Solid-State Circuits 56 (9), 2870-2880, 2021 | 69 | 2021 |
| A 1,968-node coupled ring oscillator circuit for combinatorial optimization problem solving W Moy, I Ahmed, P Chiu, J Moy, SS Sapatnekar, CH Kim Nature Electronics 5 (5), 310-317, 2022 | 46 | 2022 |
| A probabilistic self-annealing compute fabric based on 560 hexagonally coupled ring oscillators for solving combinatorial optimization problems I Ahmed, PW Chiu, CH Kim 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 42 | 2020 |
| A 65-nm 10-Gb/s 10-mm on-chip serial link featuring a digital-intensive time-based decision feedback equalizer PW Chiu, S Kundu, Q Tang, CH Kim IEEE Journal of Solid-State Circuits 53 (4), 1203-1213, 2017 | 20 | 2017 |
| 22.4 A 32Gb/s digital-intensive single-ended PAM-4 transceiver for high-speed memory interfaces featuring a 2-tap time-based decision feedback equalizer and an in-situ channel … PW Chiu, C Kim 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 336-338, 2020 | 14 | 2020 |
| A 40-Gb/s 4-VppDifferential Modulator Driver in 90-nm CMOS YF Li, PW Chiu, K Li, DJ Thomson, GT Reed, SSH Hsu IEEE Microwave and Wireless Components Letters 28 (1), 73-75, 2017 | 9 | 2017 |
| A 10Gb/s 10mm on-chip serial link in 65nm CMOS featuring a half-rate time-based decision feedback equalizer PW Chiu, S Kundu, Q Tang, CH Kim 2017 Symposium on VLSI Circuits, C56-C57, 2017 | 5 | 2017 |
| A 32Gb/s Time-Based PAM-4 Transceiver for High-Speed DRAM Interfaces With In-Situ Channel Loss and Bit-Error-Rate Monitors PW Chiu, CH Kim IEEE Transactions on Circuits and Systems I: Regular Papers 69 (5), 1943-1951, 2022 | 4 | 2022 |
| A counter based ADC non-linearity measurement circuit and its application to reliability testing G Park, M Kim, N Pande, PW Chiu, J Song, CH Kim 2019 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2019 | 4 | 2019 |
| A 2.1 pJ/bit, 8 Gb/s ultra-low power in-package serial link featuring a time-based front-end and a digital equalizer PW Chiu, M Liu, Q Tang, CH Kim 2018 IEEE Asian solid-state circuits conference (A-SSCC), 187-190, 2018 | 4 | 2018 |
| Probabilistic compute engine using coupled ring oscillators H Kim, I Ahmed, C Po-Wei US Patent 11,875,272, 2024 | 3 | 2024 |
| Time-based decision feedback equalization C Po-Wei, S Kundu, H Kim US Patent 10,284,395, 2019 | 3 | 2019 |
| High speed and low power silicon-based receiver front-end for optical interconnect SW Chen, PW Chiu, YF Li, SSH Hsu, K Li, DJ Thomson, GT Reed 2016 IEEE 13th International Conference on Group IV Photonics (GFP), 184-185, 2016 | 2 | 2016 |
| Leveraging Circuit Reliability Effects for Designing Robust and Secure Physical Unclonable Functions M Kim, G Park, P Chiu, CH Kim 2019 IEEE International Electron Devices Meeting (IEDM), 13.6. 1-13.6. 4, 2019 | | 2019 |
| Digital Intensive Transceivers for High-Speed Serial Links PW Chiu University of Minnesota, 2019 | | 2019 |
