| Strain-engineering in nanowire field-effect transistors at 3 nm technology node TP Dash, S Dey, S Das, E Mohapatra, J Jena, CK Maiti Physica E: Low-dimensional Systems and Nanostructures 118, 113964, 2020 | 24 | 2020 |
| Strain induced variability study in Gate-All-Around vertically-stacked horizontal nanosheet transistors E Mohapatra, TP Dash, J Jena, S Das, CK Maiti Physica Scripta 95 (6), 065808, 2020 | 18 | 2020 |
| Design study of gate-all-around vertically stacked nanosheet FETs for sub-7nm nodes E Mohapatra, TP Dash, J Jena, S Das, CK Maiti SN Applied Sciences 3, 1-13, 2021 | 16 | 2021 |
| Design and simulation of vertically-stacked nanowire transistors at 3 nm technology nodes S Dey, J Jena, E Mohapatra, TP Dash, S Das, CK Maiti Physica Scripta 95 (1), 014001, 2019 | 16 | 2019 |
| Vertically-stacked silicon nanosheet field effect transistors at 3nm technology nodes TP Dash, S Dey, E Mohapatra, S Das, J Jena, CK Maiti 2019 Devices for Integrated Circuit (DevIC), 99-103, 2019 | 15 | 2019 |
| Stress-Induced Variability Studies in Tri-Gate FinFETs with Source/Drain Stressor at 7 nm Technology Nodes CKM TP Dash, J Jena, E Mohapatra, S Dey, S Das Journal of Electronic Materials, 2019 | 13 | 2019 |
| Performance comparison of strained-SiGe and bulk-Si channel FinFETs at 7 nm technology node TP Dash, S Dey, S Das, J Jena, E Mohapatra, CK Maiti Journal of Micromechanics and Microengineering 29 (10), 104001, 2019 | 10 | 2019 |
| Performance and opportunities of gate-all-around vertically-stacked nanowire transistors at 3nm technology nodes S Dey, TP Dash, E Mohapatra, J Jena, S Das, CK Maiti 2019 Devices for Integrated Circuit (DevIC), 94-98, 2019 | 10 | 2019 |
| Performance Analysis of Sub-10nm Vertically Stacked Gate-All-Around FETs E Mohapatra, TP Dash, J Jena, S Das, CK Maiti 2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 331-334, 2020 | 6 | 2020 |
| Fin shape dependence of electrostatics and variability in FinFETs J Jena, TP Dash, E Mohapatra, S Dey, S Das, CK Maiti Journal of Electronic Materials 48 (10), 6742-6752, 2019 | 6 | 2019 |
| Design and optimization of stress/strain in GAA nanosheet FETs for improved FOMs at sub-7 nm nodes E Mohapatra, D Jena, S Das, CK Maiti, TP Dash Physica Scripta 98 (6), 065919, 2023 | 4 | 2023 |
| FinFET-Based Inverter Design and Optimization at 7 Nm Technology Node J Jena, D Jena, E Mohapatra, S Das, TP Dash Silicon 14 (16), 10781-10794, 2022 | 4 | 2022 |
| Performance analysis of Si-channel nanosheet FETs with strained SiGe source/drain stressors E Mohapatra, TP Dash, J Jena, S Das, J Nanda, CK Maiti Advances in Electrical Control and Signal Systems: Select Proceedings of …, 2020 | 4 | 2020 |
| Role of stress/strain mapping and random dopant fluctuation in advanced CMOS process technology nodes TP Dash, J Jena, E Mohapatra, S Das, S Dey, CK Maiti International Journal of Nano and Biomaterials 9 (1-2), 18-33, 2020 | 4 | 2020 |
| Metal grain granularity induced variability in gate-all-around si-nanowire transistors at 1nm technology node TP Dash, S Dey, J Jena, S Das, E Mohapatra, CK Maiti 2019 Devices for Integrated Circuit (DevIC), 286-290, 2019 | 4 | 2019 |
| Role of stress/strain mapping in advanced CMOS process technology nodes TP Dash, J Jena, E Mohapatra, S Dey, S Das, CK Maiti 2019 Devices for Integrated Circuit (DevIC), 21-25, 2019 | 4 | 2019 |
| Work-Function Variability impact on the performance of Vertically Stacked GAA FETs for sub-7nm Technology Node E Mohapatra, D Jena, S Das, J Jena, T Dash 2022 IEEE International Conference of Electron Devices Society Kolkata …, 2022 | 3 | 2022 |
| Strain-engineering in AlGaN/GaN HEMTs: impact of silicon nitride passivation layer on electrical performance S Das, TP Dash, D Jena, E Mohapatra, CK Maiti Physica Scripta 96 (12), 124074, 2021 | 3 | 2021 |
| Investigation of work function variation on the electrical performance of sub-7nm GAA FETs E Mohapatra, TP Dash, S Das, J Jena, J Nanda, CK Maiti 2021 Devices for Integrated Circuit (DevIC), 103-106, 2021 | 3 | 2021 |
| A simulation study of 2-d electron gas in GaN HEMT for high-speed applications D Jena, E Mohapatra, FA Ali, TP Dash 2021 Devices for Integrated Circuit (DevIC), 411-415, 2021 | 3 | 2021 |
Dr. Taraprasanna DashSMIEEE, Associate Professor, Dept. of ECE, SIKSHA 'OVerified email at soa.ac.in
Dr. Taraprasanna DashSMIEEE, Associate Professor, Dept. of ECE, SIKSHA 'OVerified email at soa.ac.in