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Prasenjit Basu
Prasenjit Basu
Samsung Research Institute, Bangalore
Verified email at samsung.com
Title
Cited by
Cited by
Year
Formal methods for analyzing the completeness of an assertion suite against a high-level fault model
S Das, A Banerjee, P Basu, P Dasgupta, PP Chakrabarti, CR Mohan, ...
18th International Conference on VLSI Design held jointly with 4th …, 2005
292005
Design-intent coverage—A new paradigm for formal property verification
P Basu, S Das, A Banerjee, P Dasgupta, PP Chakrabarti, CR Mohan, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
222006
Formal verification coverage: computing the coverage gap between temporal specifications
A Das, P Basu, A Banerjee, P Dasgupta, PP Chakrabarti, CR Mohan, ...
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004
152004
Cardiomegaly following extensive burns
GD Mukherjee, PG Basu, S Roy, M Seal
Annals of plastic surgery 19 (4), 378-380, 1987
131987
Sat based solutions for consistency problems in formal property specifications for open systems
S Roy, S Das, P Basu, P Dasgupta, PP Chakrabarti
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005
102005
Design intent coverage revisited
A Sinha, P Dasgupta, B Pal, S Das, P Basu, PP Chakrabarti
ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (1 …, 2009
92009
What lies between design intent coverage and model checking?
S Das, P Basu, P Dasgupta, PP Chakrabarti
Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006
82006
Formal verification coverage: Are the RTL-properties covering the design's architectural intent?
P Basu, S Das, P Dasgupta, PP Chakrabarti, CR Mohan, L Fix
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
72004
Keep it or not: Word level quality estimation for post-editing
P Basu, S Pal, SK Naskar
Proceedings of the Third Conference on Machine Translation: Shared Task …, 2018
52018
A cache-aware strategy for h. 264 decoding on multi-processor architectures
A Bhattacharya, A Banerjee, S Sur-Kolay, P Basu, BJ Karmakar
VLSI Design and Test: 17th International Symposium, VDAT 2013, Jaipur, India …, 2013
12013
Discovering the input assumptions in specification refinement coverage
P Basu, S Das, P Dasgupta, PP Chakrabarti
Proceedings of the 2006 Asia and South Pacific Design Automation Conference …, 2006
12006
Design Intent Verification by Formal Property Coverage
P Basu
IIT, Kharagpur, 2006
2006
An Intrusion Detection Architecture for Wireless Ad Hoc Networks
P Basu, S Pal, J Sen
2006
VLSI Design 2005 Conference Awards
A Halder, S Bhattacharya, GP Srinivasan, A Chatterjee, A Hosangadi, ...
2005
Syntactic transformation of assume-guarantee assertions: from sub-modules to modules
P Basu, P Dasgupta, PP Chakrabarti
18th International Conference on VLSI Design held jointly with 4th …, 2005
2005
Property refinement techniques for enhancing coverage of formal property verification
P Basu, P Dasgupta, PP Chakrabarti, CR Mohan
17th International Conference on VLSI Design. Proceedings., 109-114, 2004
2004
VLSID 2017
A Castagnetti, A Konar, A Roy, A Haque, A Ain, AAB da Costa, A Abedin, ...
A Fuzzy Rule Based Recommender Agent to Enhance Online Learning Experience
S Bhattacharya, P Basu
A Fuzzy Rule Based Interactive Agent to Enhance Learning Will of a Self Paced Learner
S Bhattacharya, P Basu
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