Vivek Seshadri
Vivek Seshadri
Student, CS, CMU
Verified email at cs.cmu.edu
Title
Cited by
Cited by
Year
Base-delta-immediate compression: Practical data compression for on-chip caches
G Pekhimenko, V Seshadri, O Mutlu, MA Kozuch, PB Gibbons, TC Mowry
2012 21st International Conference on Parallel Architectures and Compilation …, 2012
2912012
Base-delta-immediate compression: Practical data compression for on-chip caches
G Pekhimenko, V Seshadri, O Mutlu, MA Kozuch, PB Gibbons, TC Mowry
2012 21st International Conference on Parallel Architectures and Compilation …, 2012
2912012
A case for exploiting subarray-level parallelism (SALP) in DRAM
Y Kim, V Seshadri, D Lee, J Liu, O Mutlu
2012 39th Annual International Symposium on Computer Architecture (ISCA …, 2012
2912012
Tiered-latency DRAM: A low latency and low cost DRAM architecture
D Lee, Y Kim, V Seshadri, J Liu, L Subramanian, O Mutlu
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
2472013
RowClone: fast and energy-efficient in-DRAM bulk data copy and initialization
V Seshadri, Y Kim, C Fallin, D Lee, R Ausavarungnirun, G Pekhimenko, ...
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
2342013
Ambit: In-memory accelerator for bulk bitwise operations using commodity DRAM technology
V Seshadri, D Lee, T Mullins, H Hassan, A Boroumand, J Kim, MA Kozuch, ...
2017 50th Annual IEEE/ACM International Symposium on Microarchitecture …, 2017
1722017
Adaptive-latency DRAM: Optimizing DRAM timing for the common-case
D Lee, Y Kim, G Pekhimenko, S Khan, V Seshadri, K Chang, O Mutlu
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
1672015
MISE: Providing performance predictability and improving fairness in shared main memory systems
L Subramanian, V Seshadri, Y Kim, B Jaiyen, O Mutlu
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
1592013
The application slowdown model: Quantifying and controlling the impact of inter-application interference at shared caches and main memory
L Subramanian, V Seshadri, A Ghosh, S Khan, O Mutlu
2015 48th Annual IEEE/ACM International Symposium on Microarchitecture …, 2015
1392015
Fast bulk bitwise AND and OR in DRAM
V Seshadri, K Hsieh, A Boroum, D Lee, MA Kozuch, O Mutlu, PB Gibbons, ...
IEEE Computer Architecture Letters 14 (2), 127-131, 2015
1322015
Linearly compressed pages: a low-complexity, low-latency main memory compression framework
G Pekhimenko, V Seshadri, Y Kim, H Xin, O Mutlu, PB Gibbons, ...
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
1282013
The evicted-address filter: A unified mechanism to address both cache pollution and thrashing
V Seshadri, O Mutlu, MA Kozuch, TC Mowry
2012 21st International Conference on Parallel Architectures and Compilation …, 2012
1282012
ChargeCache: Reducing DRAM latency by exploiting row access locality
H Hassan, G Pekhimenko, N Vijaykumar, V Seshadri, D Lee, O Ergin, ...
2016 IEEE International Symposium on High Performance Computer Architecture …, 2016
1172016
The blacklisting memory scheduler: Achieving high performance and fairness at low cost
L Subramanian, D Lee, V Seshadri, H Rastogi, O Mutlu
2014 IEEE 32nd International Conference on Computer Design (ICCD), 8-15, 2014
942014
Gather-scatter DRAM: In-DRAM address translation to improve the spatial locality of non-unit strided accesses
V Seshadri, T Mullins, A Boroumand, O Mutlu, PB Gibbons, MA Kozuch, ...
Proceedings of the 48th International Symposium on Microarchitecture, 267-280, 2015
872015
Design-induced latency variation in modern DRAM chips: Characterization, analysis, and latency reduction mechanisms
D Lee, S Khan, L Subramanian, S Ghose, R Ausavarungnirun, ...
Proceedings of the ACM on Measurement and Analysis of Computing Systems 1 (1 …, 2017
792017
The dirty-block index
V Seshadri, A Bhowmick, O Mutlu, PB Gibbons, MA Kozuch, TC Mowry
ACM SIGARCH Computer Architecture News 42 (3), 157-168, 2014
662014
BLISS: Balancing performance, fairness and complexity in memory access scheduling
L Subramanian, D Lee, V Seshadri, H Rastogi, O Mutlu
IEEE Transactions on Parallel and Distributed Systems 27 (10), 3071-3087, 2016
592016
Mitigating prefetcher-caused pollution using informed caching policies for prefetched blocks
V Seshadri, S Yedkar, H Xin, O Mutlu, PB Gibbons, MA Kozuch, TC Mowry
ACM Transactions on Architecture and Code Optimization (TACO) 11 (4), 1-22, 2015
562015
Pipedream: Fast and efficient pipeline parallel dnn training
A Harlap, D Narayanan, A Phanishayee, V Seshadri, N Devanur, ...
arXiv preprint arXiv:1806.03377, 2018
472018
The system can't perform the operation now. Try again later.
Articles 1–20