Angsuman Sarkar
Angsuman Sarkar
Professor, Electronics & Communication Engg. Department, Kalyani Govt. Engg. College
Verified email at ieee.org - Homepage
Title
Cited by
Cited by
Year
Effect of gate engineering in double-gate MOSFETs for analog/RF applications
A Sarkar, AK Das, S De, CK Sarkar
Microelectronics Journal 43 (11), 873-882, 2012
1332012
Analytical study of Dual Material Surrounding Gate MOSFET to suppress short-channel effects (SCEs)
A Pal, A Sarkar
Engineering Science and Technology, an International Journal, 2014
802014
Analog and RF performance investigation of cylindrical surrounding-gate MOSFET with an analytical pseudo-2D model
A Sarkar, S De, A Dey, CK Sarkar
Journal of Computational Electronics 11 (2), 182-195, 2012
412012
Technology Computer Aided Design: Simulation for VLSI MOSFET
CK Sarkar
CRC Press, 2013
362013
The influence of gate underlap on analog and RF performance of III–V heterostructure double gate MOSFET
A Sarkar, R Jana
Superlattices and Microstructures 73, 256-267, 2014
302014
Analytical modeling and sensitivity analysis of dielectric-modulated junctionless gate stack surrounding gate MOSFET (JLGSSRG) for application as biosensor
A Chakraborty, A Sarkar
Journal of Computational Electronics 16 (3), 556-567, 2017
232017
Study of effect of gate-length downscaling on the analog/RF performance and linearity investigation of InAs-based nanowire Tunnel FET
SM Biswal, B Baral, D De, A Sarkar
Superlattices and Microstructures 91, 319-330, 2016
222016
Investigation of analog/RF performance of staggered heterojunctions based nanowire tunneling field-effect transistors
A Chakraborty, A Sarkar
Superlattices and Microstructures 80, 125-135, 2015
222015
Impact of barrier thickness on Analog, RF and Linearity performance of nanoscale DG heterostructure MOSFET
K Biswas, A Sarkar, CK Sarkar
Superlattices and Microstructures 86, 95-104, 2015
212015
Fin shape influence on analog and RF performance of junctionless accumulation-mode bulk FinFETs
K Biswas, A Sarkar, CK Sarkar
Microsystem Technologies 24 (5), 2317-2324, 2018
192018
A new analytical subthreshold model of SRG MOSFET with analogue performance investigation
A Sarkar, S De, A Dey, CK Sarkar
International Journal of Electronics 99 (2), 267-283, 2012
182012
An analytical model of triple‐material double‐gate metal–oxide–semiconductor field‐effect transistor to suppress short‐channel effects
B Baral, AK Das, D De, A Sarkar
International Journal of Numerical Modelling: Electronic Networks, Devices …, 2016
172016
RF and analogue performance investigation of DG tunnel FET
A Sarkar, CK Sarkar
International Journal of Electronics Letters 1 (4), 210-217, 2013
172013
Analytical subthreshold modeling of dual material gate engineered nano-scale junctionless surrounding gate MOSFET considering ECPE
SM Biswal, B Baral, D De, A Sarkar
Superlattices and Microstructures 82, 103-112, 2015
162015
1/f noise and analogue performance study of short-channel cylindrical surrounding gate MOSFET using a new subthreshold analytical pseudo-two-dimensional model
A Sarkar, S De, A Dey, CK Sarkar
IET circuits, devices & systems 6 (1), 28-34, 2012
162012
Spacer engineering for performance enhancement of junctionless accumulation-mode bulk FinFETs
K Biswas, A Sarkar, CK Sarkar
IET Circuits, Devices & Systems 11 (1), 80-88, 2017
152017
Study of RF performance of surrounding gate MOSFET with gate overlap and underlap
A Sarkar
Advances in Natural Sciences: Nanoscience and Nanotechnology 5 (3), 035006, 2014
152014
Asymmetric halo and symmetric SHDMG & DHDMGn‐MOSFETs characteristic parameter modeling
A Sarkar, S De, CK Sarkar
IJNM, Wiley, USA 26 (1), 41-55, 2013
15*2013
Effect of gate engineering in JLSRG MOSFET to suppress SCEs: An analytical study
S Bari, D De, A Sarkar
Physica E: Low-dimensional Systems and Nanostructures 67, 143-151, 2015
122015
Analytical computation of electrical parameters in GAAQWT and CNTFET with identical configuration using NEGF method
A Deyasi, A Sarkar
International Journal of Electronics 105 (12), 2144-2159, 2018
102018
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Articles 1–20