A new logic encryption strategy ensuring key interdependency R Karmakar, N Prasad, S Chattopadhyay, R Kapur, I Sengupta 2017 30th International Conference on VLSI Design and 2017 16th …, 2017 | 37 | 2017 |
Design and evaluation of ZMesh topology for on-chip interconnection networks N Prasad, P Mukherjee, S Chattopadhyay, I Chakrabarti Journal of Parallel and Distributed Computing 113, 17-36, 2018 | 36 | 2018 |
Runtime Mitigation of Illegal Packet Request Attacks in Networks-on-Chip N Prasad, R Karmakar, S Chattopadhyay, I Chakrabarti 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 21 | 2017 |
A parallel stochastic number generator with bit permutation networks V Sehwag, N Prasad, I Chakrabarti IEEE Transactions on Circuits and Systems II: Express Briefs 65 (2), 231-235, 2017 | 18 | 2017 |
An energy-efficient network-on-chip-based reconfigurable Viterbi decoder architecture N Prasad, I Chakrabarti, S Chattopadhyay IEEE Transactions on Circuits and Systems I: Regular Papers 65 (10), 3543-3554, 2018 | 15 | 2018 |
FPGA implementation of 16-point radix-4 complex FFT core using NEDA A Mankar, AD Das, N Prasad 2013 Students Conference on Engineering and Systems (SCES), 1-5, 2013 | 13 | 2013 |
FPGA implementation of pipelined CORDIC based quadrature direct digital synthesizer with improved SFDR N Prasad, AK Swain, KK Mahapatra 2013 International Conference on Circuits, Power and Computing Technologies …, 2013 | 12 | 2013 |
Efficient VLSI Architectures of Split Radix FFT using New Distributed Arithmetic AD Das, A Mankar, N Prasad, KK Mahapatra, AK Swain International Journal of Soft Computing and Engineering 3 (1), 264-271, 2013 | 11 | 2013 |
A Spare Link Based Reliable Network-on-Chip Design N Chatterjee, N Prasad, S Chattapadhya VLSI Design and Test, 18th International Symposium on, 1-6, 2014 | 7 | 2014 |
Multiplier‐less VLSI architectures for radix‐22 folded pipelined complex FFT core A Mankar, N Prasad, ADS Das, S Meher International Journal of Circuit Theory and Applications 43 (11), 1743-1758, 2015 | 6 | 2015 |
Efficient VLSI implementation of CORDIC-based direct digital synthesizer N Prasad, MR Tripathy, ADS Das, NR Behera, A Swain Intelligent Computing, Communication and Devices: Proceedings of ICCD 2014 …, 2015 | 5 | 2015 |
FPGA implementation of retimed low power and high throughput DCT core using NEDA A Mankar, N Prasad, AD Das 2013 Students Conference on Engineering and Systems (SCES), 1-4, 2013 | 5 | 2013 |
Design and error analysis of a scale free CORDIC unit with corrected scale factor N Prasad, AK Swain, KK Mahapatra 2012 Asia Pacific Conference on Postgraduate Research in Microelectronics …, 2012 | 5 | 2012 |
Approximate conditional carry adder for error tolerant applications AS Roy, N Prasad, AS Dhar 2016 20th International Symposium on VLSI Design and Test (VDAT), 1-6, 2016 | 3 | 2016 |
ZMesh: An Energy-Efficient Network-on-Chip Topology for Constant-Geometry Algorithms N Prasad, S Chattopadhyay, I Chakrabarti 2015 IEEE International Symposium on Nanoelectronic and Information Systems …, 2015 | 3 | 2015 |
FPGA implementation of discrete Fourier transform core using NEDA A Mankar, N Prasad, S Meher 2013 International Conference on Communication Systems and Network …, 2013 | 3 | 2013 |
Dynamically Adaptable Arrays for Vector and Matrix Operations S Lagudu, A H. Rush, M Mantor, AV Ananthanarayan, ... US Patent 11,409,840, 2022 | 2 | 2022 |
Embedding delay‐based physical unclonable functions in networks‐on‐chip P Nagabhushanamgari, V Sehwag, I Chakrabarti, S Chattopadhyay IET Circuits, Devices & Systems 15 (1), 27-41, 2021 | 2 | 2021 |
NoC Based Multiplier-Less Constant Geometry FFT Architecture N Prasad, I Chakrabarti, S Chattopadhyay 2014 Fourth International Conference of Emerging Applications of Information …, 2014 | 2 | 2014 |
Vertical and Horizontal Broadcast of Shared Operands S Lagudu, A H. Rush, M Mantor, AV Ananthanarayan, ... US Patent 11,635,967, 2022 | 1 | 2022 |