Reiner Hartenstein
Reiner Hartenstein
University of Kaiserslautern & KIT Karlsruhe
Verified email at hartenstein.de - Homepage
TitleCited byYear
A decade of reconfigurable computing: a visionary retrospective
R Hartenstein
Proceedings of the conference on Design, automation and test in Europe, 642-649, 2001
8382001
Coarse grain reconfigurable architecture (embedded tutorial)
R Hartenstein
Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001
2652001
Seeking solutions in configurable computing
WH Mangione-Smith, B Hutchings, D Andrews, A DeHon, C Ebeling, ...
Computer 30 (12), 38-43, 1997
2391997
A datapath synthesis system for the reconfigurable datapath architecture
RW Hartenstein, R Kress
Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair, 479-484, 1995
1711995
KressArray Xplorer: A new CAD environment to optimize reconfigurable datapath array architectures
R Hartenstein, M Herz, T Hoffmann, U Nageldinger
Proceedings 2000. Design Automation Conference.(IEEE Cat. No. 00CH37106 …, 2000
1102000
Parallelization in co-compilation for configurable accelerators-a host/accelerator partitioning compilation method
J Becker, R Hartenstein, M Herz, U Nageldinger
Proceedings of 1998 Asia and South Pacific Design Automation Conference, 23-33, 1998
1051998
A new FPGA architecture for word-oriented datapaths
RW Hartenstein, R Kress, H Reinig
International Workshop on Field Programmable Logic and Applications, 144-155, 1994
1021994
Configware and morphware going mainstream
J Becker, R Hartenstein
Journal of Systems Architecture 49 (4-6), 127-142, 2003
972003
Trends in reconfigurable logic and reconfigurable computing
R Hartenstein
9th International Conference on Electronics, Circuits and Systems 2, 801-808, 2002
602002
A novel ASIC design approach based on a new machine paradigm
RW Hartenstein, AG Hirschbiel, M Riedmuller, K Schmidt, M Weber
IEEE Journal of Solid-State Circuits 26 (7), 975-989, 1991
591991
Using the KressArray for reconfigurable computing
RW Hartenstein, M Herz, T Hoffmann, U Nageldinger
Configurable Computing: Technology and Applications 3526, 150-161, 1998
561998
Fundamentals of structured hardware design: a design language approach at register transfer level
RW Hartenstein
North-Holland, 1977
561977
Reconfigurable systems for sequence alignment and for general dynamic programming
RP Jacobi, M Ayala-Rincón, LGA Carvalho, CH Llanos, RW Hartenstein
Genetics and Molecular Research 4 (3), 543-552, 2005
542005
A novel paradigm of parallel computation and its use to implement simple high performance hardware
RW Hartenstein, AG Hirschbiel, M Weber
CONPAR 90—VAPP IV, 51-62, 1990
541990
A reconfigurable data-driven ALU for Xputers
RW Hartenstein, R Kress, H Reinig
Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines, 139-146, 1994
531994
A threshold logic synthesis tool for RTD circuits
MJ Avedillo, JM Quintana
Euromicro Symposium on Digital System Design, 2004. DSD 2004., 624-627, 2004
502004
A General Approach in System Design Integrating Reconfigurable Accelerators
RW Hartenstein, J Becker, M Herz, U Nageldinger
1996 Proceedings. Eighth Annual IEEE International Conference on Innovative …, 1996
501996
Reconfigurable machine for applications in image and video compression
RW Hartenstein, J Becker, R Kress, H Reinig, K Schmidt
Advanced Image and Video Communications and Storage Technologies 2451, 9-20, 1995
471995
Reconfigurable computing: A new business model-and its impact on SoC design
R Hartenstein
Proceedings Euromicro Symposium on Digital Systems Design, 103-110, 2001
462001
The microprocessor is no more general purpose: Why future reconfigurable platforms will win
R Hartenstein
Proceedings of the Second Annual IEEE International Conference on Innovative …, 1997
461997
The system can't perform the operation now. Try again later.
Articles 1–20