| An efficient design of 16 bit mac unit using vedic mathematics ASK Vamsi, SR Ramesh 2019 international conference on communication and signal processing (ICCSP …, 2019 | 24 | 2019 |
| Area and power efficient 64-bit booth multiplier PK Somayajulu, SR Ramesh 2020 6th International Conference on Advanced Computing and Communication …, 2020 | 15 | 2020 |
| Hardware Trojan Detection using Supervised Machine Learning RSR Gowtham M, Kolluru Sri Harsha, Jami Nikhil, Maturi Sai Eswar 6th International Conference on Communication and Electronics Systems (ICCES …, 2021 | 13 | 2021 |
| Power and delay efficient ALU using vedic multiplier D Lachireddy, SR Ramesh Advances in Electrical and Computer Technologies: Select Proceedings of …, 2020 | 13 | 2020 |
| Artificial neural network model for arrival time computation in gate level circuits SR Ramesh, R Jayaparvathy Automatika: časopis za automatiku, mjerenje, elektroniku, računarstvo i …, 2019 | 12 | 2019 |
| Fpga implementation of power efficient approximate multipliers KG Hemamithra, SL Priya, K Lakshmirajan, R Mohanrai, SR Ramesh 2018 3rd IEEE International Conference on Recent Trends in Electronics …, 2018 | 12 | 2018 |
| Design of an enhanced array based approximate arithmetic computing model for multipliers and squarers H Haritha, SR Ramesh 2017 14th IEEE India council international conference (INDICON), 1-5, 2017 | 10 | 2017 |
| A Survey of SSTA Techniques with Focus on Accuracy and Speed SRR Bhaghath P J International Journal of Computer Applications 89 (7), 21-25, 2014 | 9 | 2014 |
| Design of Delay Efficient Hybrid Adder for High Speed Applications J Nithya, SR Ramesh 2019 5th International Conference on Advanced Computing & Communication …, 2019 | 7 | 2019 |
| Toggle rate estimation technique for FPGA circuits considering spatial correlation PJ Anju, SR Ramesh 2012 Third International Conference on Computing, Communication and …, 2012 | 7 | 2012 |
| A low power signed redundant binary vedic multiplier C Mahitha, SCS Ayyar, S Dutta, A Othayoth, SR Ramesh 2021 5th International Conference on Trends in Electronics and Informatics …, 2021 | 6 | 2021 |
| A novel approach for statistical parameter estimation and test pattern generation GS Nandith, SR Ramesh 2020 4th International Conference on Trends in Electronics and Informatics …, 2020 | 6 | 2020 |
| An efficient booth multiplier using probabilistic approach MVD Pavan, SR Ramesh 2018 International Conference on Communication and Signal Processing (ICCSP …, 2018 | 6 | 2018 |
| Toggle rate estimation and glitch analysis on logic circuits SR Ramesh, R Jayaparvathy 2017 IEEE International Workshop On Integrated Power Packaging (IWIPP), 1-5, 2017 | 6 | 2017 |
| Probabilistic Activity Estimator and Timing Analysis for LUT Based Circuits RJ Ramesh.S.R International Journal Of Applied Engineering Research 10 (13), 33238-33242, 2015 | 6 | 2015 |
| Flip-flop-based approach for logic encryption technique M Anupama, SR Ramesh Inventive Communication and Computational Technologies: Proceedings of …, 2022 | 5 | 2022 |
| Hardware Trojan Detection using Ring Oscillator NDM Deepthi S, Ramesh S. R 6th International Conference on Communication and Electronics Systems (ICCES …, 2021 | 5 | 2021 |
| Design of combinational arithmetic circuits using quantum dot cellular automata BM Reddy, SR Ramesh 2021 5th international conference on trends in electronics and informatics …, 2021 | 5 | 2021 |
| Cloud storage optimization for video surveillance applications R Marceline, SR Akshaya, S Athul, KL Raksana, SR Ramesh 2020 Third International Conference on Smart Systems and Inventive …, 2020 | 5 | 2020 |
| Design of soft edge flip flops for the reduction of power delay product in linear pipeline circuits K Manikanth, SR Ramesh 2018 International Conference on Communication and Signal Processing (ICCSP …, 2018 | 5 | 2018 |
