Pablo Montesinos
Cited by
Cited by
SESC Simulator
J Renau, B Fraguela, J Tuck, W Liu, M Prvulovic, L Ceze, S Sarangi, ...
Proving program termination
B Cook, A Podelski, A Rybalchenko
Communications of the ACM 54 (5), 88-98, 2011
BulkSC: bulk enforcement of sequential consistency
L Ceze, J Tuck, P Montesinos, J Torrellas
Proceedings of the 34th annual international symposium on Computer …, 2007
Delorean: Recording and deterministically replaying shared-memory multiprocessor execution ef? ciently
P Montesinos, L Ceze, J Torrellas
ACM SIGARCH Computer Architecture News 36 (3), 289-300, 2008
Volumetric preload measurement by thermodilution: a comparison with transoesophageal echocardiography
CK Hofer, L Furrer, S Matter-Ensner, M Maloigne, R Klaghofer, M Genoni, ...
British journal of anaesthesia 94 (6), 748-755, 2005
Capo: a software-hardware interface for practical deterministic multiprocessor replay
P Montesinos, M Hicks, ST King, J Torrellas
Proceedings of the 14th international conference on Architectural support …, 2009
ReViveI/O: Efficient handling of I/O in highly-available rollback-recovery servers
J Nakano, P Montesinos, K Gharachorloo, J Torrellas
The Twelfth International Symposium on High-Performance Computer …, 2006
Using register lifetime predictions to protect register files against soft errors
P Montesinos, W Liu, J Torrellas
37th Annual IEEE/IFIP International Conference on Dependable Systems and …, 2007
SESC simulator, 2005
J Renau, B Fraguela, J Tuck, W Liu, M Prvulovic, L Ceze, S Sarangi, ...
J Renau, B Fraguela, J Tuck, W Liu, M Prvulovic, L Ceze, S Sarangi, ...
ZOOMM: a parallel web browser engine for multicore mobile devices
C Cascaval, S Fowler, P Montesinos-Ortego, W Piekarski, M Reshadi, ...
ACM SIGPLAN Notices 48 (8), 271-280, 2013
Colorama: Architectural support for data-centric synchronization
L Ceze, P Montesinos, C Von Praun, J Torrellas
2007 IEEE 13th International Symposium on High Performance Computer …, 2007
A case for parallelizing web pages
H Mai, S Tang, ST King, C Cascaval, P Montesinos
Presented as part of the 4th {USENIX} Workshop on Hot Topics in Parallelism, 2012
Two hardware-based approaches for deterministic multiprocessor replay
DR Hower, P Montesinos, L Ceze, MD Hill, J Torrellas
Communications of the ACM 52 (6), 93-100, 2009
The Bulk Multicore architecture for improved programmability
J Torrellas, L Ceze, J Tuck, C Cascaval, P Montesinos, W Ahn, ...
Communications of the ACM 52 (12), 58-65, 2009
Concurrency control with data coloring
L Ceze, C Von Praun, C Caşcaval, P Montesinos, J Torrellas
Proceedings of the 2008 ACM SIGPLAN workshop on Memory systems performance …, 2008
Automatic Discovery of Performance and Energy Pitfalls in HTML and CSS
A Sampson, C Cascaval, L Ceze, P Montesinos, DS Gracia
International Symposium on Workload Characterization (IISWC), 2012
SESC: cycle accurate architectural simulator
J Renau, B Fraguela, J Tuck, W Liu, M Prvulovic, L Ceze, S Sarangi, ...
Retrieved November 19, 2013, 2005
Shield: Cost-effective soft-error protection for register files
P Montesinos, W Liu, J Torrellas
Third IBM TJ Watson Conference on Interaction between Architecture, Circuits …, 2006
Method for simplified task-based runtime for efficient parallel computing
H Zhao, PM Ortego, A Raman, B Robatmili, GC Cascaval
US Patent 10,169,105, 2019
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