| Design and Analog performance analysis of triple material gate based doping-less tunnel field effect transistor U Mushtaq, LR Solay, SI Amin, S Anand Journal of Nanoelectronics and Optoelectronics 14 (8), 1177-1182, 2019 | 15 | 2019 |
| Design and analysis of gate engineered dual material gate double gate impact ionization metal oxide semiconductor LR Solay, S Singh, SI Amin, S Anand Transactions on Electrical and Electronic Materials 20, 132-140, 2019 | 13 | 2019 |
| Design and performance analysis of gate-all-around negative capacitance dopingless nanowire tunnel field effect transistor LR Solay, N Kumar, SI Amin, P Kumar, S Anand Semiconductor Science and Technology 37 (11), 115001, 2022 | 11 | 2022 |
| Design of dual-gate P-type IMOS based industrial purpose pressure sensor LR Solay, S Singh, N Kumar, SI Amin, S Anand Silicon 13 (12), 4633-4640, 2021 | 11 | 2021 |
| Implementation of gate-all-around gate-engineered charge plasma nanowire FET-based common source amplifier S Singh, LR Solay, S Anand, N Kumar, R Ranjan, A Singh Micromachines 14 (7), 1357, 2023 | 9 | 2023 |
| Design and analysis of gate engineered gate-AII-Around (GAA) charge plasma nanowire field effect transistor LR Solay, P Kumar, I Amin, S Anand 2021 6th international conference for convergence in technology (I2CT), 1-5, 2021 | 9 | 2021 |
| Enhancing the design and performance of a gate-all-around (GAA) charge plasma nanowire field-effect transistor with the help of the negative-capacitance technique LR Solay, SI Amin, P Kumar, S Anand Journal of Computational Electronics 20 (6), 2350-2359, 2021 | 8 | 2021 |
| Doping-less TFET based common source amplifier implementation and behaviour analysis under symmetric and asymmetric conditions A Bhardwaj, LR Solay, N Kumar, SI Amin, A Singh, B Raj, P Kumar, ... Silicon 14 (18), 12251-12260, 2022 | 5 | 2022 |
| Investigation of Common Source Amplifier Circuit using Gate Stack-Based GAA Dopingless Nanowire Field Effect Transistor LR Solay, P Kumar, SI Amin, S Anand ECS Journal of Solid State Science and Technology 11 (8), 083012, 2022 | 4 | 2022 |
| Design and Implementation of Negative Capacitance Based Electrostatic Doped Double Gate Tunnel Field Effect Transistor MA Lone, LR Solay, A Singh, SI Amin, S Anand Silicon 14 (18), 12293-12301, 2022 | 1 | 2022 |
| Design And Analysis Of Gate-All-Around (GAA) Triple Material Gate Charge Plasma Nanowire FET LR Solay, S Anand, SI Amin, P Kumar 2021 International Conference on Disruptive Technologies for Multi …, 2021 | 1 | 2021 |
| Design and sensitivity analysis of GAA nanowire dopingless FET based label free biosensor LR Solay, N Kumar, S Singh, SI Amin, S Yuvaraja, S Anand Physica Scripta, 2024 | | 2024 |
| Design and Investigation of SRAM using Charge Plasma Dopingless Nanowire FET P Goel, MG Agrawal, S Anand, P Kumar, LR Solay 2023 World Conference on Communication & Computing (WCONF), 1-8, 2023 | | 2023 |
| Design and Implementation of CS Amplifier using Si0.5Ge0.5 Source Based Gate all around Dopingless Nanotube Tunnel FET V Thalapalli, TN Konathala, LR Solay, P Kumar 2023 World Conference on Communication & Computing (WCONF), 1-6, 2023 | | 2023 |
| Design and Analysis of 6T SRAM Implementation upon Dual Gate Junctionless FET A Adlakha, W Hussain, LR Solay, SI Amin, S Anand, P Kumar 2023 3rd International Conference on Intelligent Technologies (CONIT), 1-6, 2023 | | 2023 |
| Design of Negative Capacitance based Dopantfree Junctionless Nanowire Tunnel FET for Analog and Linearity Analysis E Latief, P Kumar, S Anand, LR Solay 2023 8th International Conference on Communication and Electronics Systems …, 2023 | | 2023 |
SUNNY ANANDHCl, NoidaVerified email at hcltech.com
