| Design of low power 10GS/s 6-Bit DAC using CMOS technology KHK P.Ramakrishna International Journal of Engineering & Technology(UAE) 7 (2), 226-229, 2018 | 27 | 2018 |
| Implementation of low power and area efficient 7-bit flash analog to digital converter P Ramakrishna, K Hari Kishore, G Chandana Journal of Computational and Theoretical Nanoscience 16 (5-6), 2213-2217, 2019 | 15 | 2019 |
| A low power 8-bit current-steering DAC using CMOS technology P Ramakrishna, M Nagarani, KH Kishore International Journal of Innovative Technology and Exploring Engineering …, 2019 | 15 | 2019 |
| FPGA Implementation of DWT-SPIHT Algorithm for Image Compression IV Anjaneyulu, PR Krishna International Journal of Technology Enhancements and Emerging Engineering …, 2014 | 9 | 2014 |
| A low-power reconfigurable ADC for bioimpedance monitoring system PR Krishna, KH Kishore, M Swathi Electronic Devices, Circuits, and Systems for Biomedical Applications, 229-256, 2021 | 5 | 2021 |
| A sub threshold source coupled logic based design of low power CMOS analog multiplexer G Deepika, PR Krishna, KS Rao International Journal of VLSI Design & Communication Systems 5 (5), 45, 2014 | 5 | 2014 |
| FPGA Implementation of Memory Bists using Single Interface TV P Ramakrishna, M.Swathi International journal of Recent Technology and engineering 9 (3), 55-58, 2020 | 4* | 2020 |
| Design of an ultra low power CMOS comparator for data converters P Ramakrishna, KH Kishore Journal of Advanced Research in Dynamical and Control Systems, ISSN No, 1347 …, 2018 | 4 | 2018 |
| Design of ultra low power 8-channel analog multiplexer using dynamic threshold for biosignals H Priya, DKS Rao International Journal of VLSI design & Communication Systems (VLSICS) Vol 4, 2013 | 4 | 2013 |
| DESIGN OF LOW POWER HIGH PERFORMANCE 4 -16 MIXED LOGIC LINE DECODER P RAMAKRISHNA IJCESR 5 (4), 344-349, 2018 | 3 | 2018 |
| Designing a D-Flipflop Using Novel Sleep Transistor Technique CM Reddy, S Dhara, B Srikanth, P Ramakrishna 2022 IEEE International Conference on Electronics, Computing and …, 2022 | 2 | 2022 |
| A low power front end analog multiplexing unit for 12 lead ecg signal acquisition H Priya, DKS Rao International Journal of VLSI design & Communication Systems (VLSICS) Vol 5, 2014 | 2 | 2014 |
| An Inductor Less Low Power Low Noise Amplifier for Wireless Applications P Ramakrishna, B Akhil, B Srikanth, S Pothalaiah RES MILITARIS 13 (2), 5766-5778, 2023 | 1 | 2023 |
| Lorawan-Bassed Satellite Monitoring System Uses IMU Sensor DN Singh, P Ramakrishna, J Nikhileshwar, G Akshaya, K Karthik, ... Res Militaris 12 (4), 1300-1309, 2022 | 1 | 2022 |
| High Speed Viterbi Decoder Design With A Rate Of ½ Convolution Code For Tcm Systems AS Reddy, PR Krishna | 1 | 2013 |
| HIGH THROUGHPUT AND AREA EFFICIENT FINITE FIELD MULTIPLIER USING URDHVA TIRYAGBYAM DP Ramakrishna Material science technology 22 (12), 247-254, 2023 | | 2023 |
| Design and Implementation of Power-Efficient Cryptography Scheme Using a Novel Multiplication Technique B Srikanth, JVR Ravindra, P Ramakrishna, D Ajitha Wireless Personal Communications 131 (1), 251-270, 2023 | | 2023 |
| A Conditional Feedthrough Pulsed Flip-Flop using MTCMOS Technique MU Kiran, KR Reddy, VS Nithin, B Srikanth, P Ramakrishna 2023 4th International Conference for Emerging Technology (INCET), 1-5, 2023 | | 2023 |
| Design and Implementation of Power-Efficient Cryptography Scheme Using a Novel Multiplication Technique B Srik, J Ravindra, P Ramakrishna, D Ajitha | | 2022 |
| A Low Power Auto Adaption Unit for Reconfigurable Data Converter R Paramata, KH Kishore, M Swathi, P Divya Proceedings of the 4th International Conference: Innovative Advancement in …, 2020 | | 2020 |
Dr. Kakarla Hari KishoreProfessor in ECE, K L University, Guntur, A.P, IndiaVerified email at kluniversity.in
