| Performance analysis of high speed low power carry look-ahead adder using different logic styles J Samanta, M Halder, BP De International Journal of Soft Computing and Engineering (IJSCE) 2 (6), 330-336, 2013 | 33 | 2013 |
| Comparative study for delay & power dissipation of CMOS Inverter in UDSM range J Samanta, BP De, B Bag, RK Maity International Journal of Soft Computing and Engineering (IJSCE) 1 (6), 6, 2012 | 24 | 2012 |
| Lower complexity error location detection block of adjacent error correcting decoder for SRAMs RK Maity, S Tripathi, J Samanta, J Bhaumik IET Computers & Digital Techniques 14 (5), 210-216, 2020 | 18 | 2020 |
| Compact and Power Efficient SEC-DED Codec for Computer Memory J Samanta, J Bhaumik, S Barman Microsystem Technologies, 1-10, 2019 | 17 | 2019 |
| Fast and power efficient sec-ded and sec-ded-daec codes in iot based wireless sensor networks S Tripathi, J Jana, J Samanta, J Bhaumik TENCON 2019-2019 IEEE Region 10 Conference (TENCON), 540-545, 2019 | 14 | 2019 |
| Comments on “a novel approach of error detection and correction for efficient energy in wireless networks” J Samanta, S Tripathi Multimedia Tools and Applications 78 (6), 7579–7584, 2018 | 12 | 2018 |
| Compact CA-based Single Byte Error Correcting Codec J Samanta, J Bhaumik, S Barman IEEE Transactions on Computers 67 (2), 291-298, 2017 | 12 | 2017 |
| FPGA based modified Karatsuba multiplier J Samanta, R Sultana, J Bhaumik Proc. Int. Conf. VLSI Signal Process.(ICVSP) 10, 12, 2014 | 12 | 2014 |
| An Area and Power Efficient Double Adjacent Error Correcting Parallel Decoder based on (24, 12) Extended Golay Code RK Maity, J Samanta, J Bhaumik Conference: 2019 IEEE International Conference on Electrical, Computer and …, 2019 | 8 | 2019 |
| Comprehensive analysis of delay in UDSM CMOS circuits J Samanta, BP De IEEE Electronics, Communication and Computing Technologies (ICECCT), 2011 …, 2011 | 8 | 2011 |
| FPGA Based Low Area Multi-bit Adjacent Error Correcting Codec for SRAM Application S Tripathi, RK Maity, J Jana, J Samanta, J Bhaumik Radioelectronics and Communications Systems volume 63, 543–552, 2020 | 7 | 2020 |
| Design and evaluation of neale-based multi-bit adjacent error-correcting codec for sram S Tripathi, J Jana, J Samanta, A Raj, D Ranjan, MP Singh International Conference on Communication, Devices and Computing, 259-268, 2019 | 7 | 2019 |
| FPGA based area efficient RS (23, 17) codec J Samanta, J Bhaumik, S Barman Microsystem Technologies 23, 639-650, 2017 | 7 | 2017 |
| Compact RS (32, 28) encoder J Samanta, J Bhaumik, S Barman Intelligent Computing and Applications: Proceedings of the International …, 2015 | 7 | 2015 |
| Different physical effects in UDSM MOSFET for delay & power estimation: A review AK Singh, J Samanta 2012 IEEE Students' Conference on Electrical, Electronics and Computer …, 2012 | 7 | 2012 |
| Construction Technique and Evaluation of High Performance -bit Burst Error Correcting Codes for Protecting MCUs RK Maity, J Samanta, J Bhaumik Journal of Circuits, Systems and Computers 32 (09), 2350142, 2023 | 6 | 2023 |
| Single and Double-adjacent Error Correcting Code (SDECC) with Lower Design Overheads and Mis-correction Rate for SRAMs RK Maity, J Samanta, J Bhaumik Microsystem Technologies, 2023 | 6 | 2023 |
| FPGA and asic implementation of sec-ded-daec codes for sram applications S Tripathi, J Jana, J Samanta, A Anand, C Kumar, G Raj International Conference on Communication, Devices and Computing, 237-247, 2019 | 6 | 2019 |
| Comparison of different design techniques of XOR & AND gate using EDA simulation tool R SULTANA, J SAMANTA International Journal of VLSI and Embedded Systems (IJVES) 4 (3), 343-349, 2013 | 6 | 2013 |
| Performance evaluation of low-cost RGB-depth camera and ultrasonic sensors A Adhikary, R Vatsa, A Burnwal, J Samanta International Conference on Communication, Devices and Computing, 331-341, 2019 | 5 | 2019 |
Jaydeb BhaumikProfessor, Dept of ETCE, Jadavpur University, KolkataVerified email at gssst.iitkgp.ernet.in
