| A novel extended source TFET with δp+-SiGe layer J Talukdar, G Rawat, K Mummaneni Silicon 12 (10), 2273-2281, 2020 | 51 | 2020 |
| A non-uniform silicon TFET design with dual-material source and compressed drain J Talukdar, K Mummaneni Applied Physics A 126 (1), 81, 2020 | 32 | 2020 |
| Comparative Analysis of the Effects of Trap Charges on Single-and Double-Gate Extended-Source Tunnel FET with dp SiGe Pocket Layer J Talukdar, G Rawat, K Singh, K Mummaneni | 25 | 2020 |
| Dielectrically modulated single and double gate tunnel FET based biosensors for enhanced sensitivity J Talukdar, G Rawat, K Mummaneni IEEE Sensors Journal 21 (23), 26566-26573, 2021 | 24 | 2021 |
| Low frequency noise analysis of single gate extended source tunnel FET J Talukdar, G Rawat, K Singh, K Mummaneni Silicon 13, 3971-3980, 2021 | 18 | 2021 |
| Device physics based analytical modeling for electrical characteristics of single gate extended source tunnel FET (SG-ESTFET) J Talukdar, G Rawat, B Choudhuri, K Singh, K Mummaneni Superlattices and Microstructures 148, 106725, 2020 | 14 | 2020 |
| Estimation of frequency and amplitude of ring oscillator built using current sources AJ Mondal, J Talukdar, BK Bhattacharyya Ain Shams Engineering Journal 11 (3), 677-686, 2020 | 12 | 2020 |
| Source pocket-engineered hetero-gate dielectric SOI Tunnel FET with improved performance V Sharma, S Kumar, J Talukdar, K Mummaneni, G Rawat Materials Science in Semiconductor Processing 143, 106541, 2022 | 8 | 2022 |
| Impact of temperature counting the effect of back gate bias on the performance of extended source tunnel FET (ESTFET) with δp+ SiGe pocket layer J Talukdar, B Choudhuri, K Mummaneni Applied Physics A 127 (1), 24, 2021 | 8 | 2021 |
| A novel extended source TFET with δp+− SiGe layer. Silicon 12: 2273–2281 J Talukdar, G Rawat, K Mummaneni | 5 | 2020 |
| Analytical modeling and TCAD simulation for subthreshold characteristics of asymmetric Tunnel FET J Talukdar, G Rawat, K Mummaneni Materials Science in Semiconductor Processing 142, 106482, 2022 | 4 | 2022 |
| Noise behavior and reliability analysis of non-uniform body tunnel FET with dual material source J Talukdar, G Rawat, K Mummaneni Microelectronics Reliability 131, 114510, 2022 | 3 | 2022 |
| Comparative Analysis of Noise Behavior of Highly Doped Double Pocket Double-Gate and Single-Gate Negative Capacitance FET Malvika, J Talukdar, V Kumar, B Choudhuri, K Mummaneni Journal of Electronic Materials 52 (9), 6203-6215, 2023 | 2 | 2023 |
| Implementation of Arithmetic Logic Unit Using Area-Efficient Adder A Zade, SK Singha, J Talukdar, A Prathima, K Mummaneni Proceedings of the International Conference on Computational Intelligence …, 2022 | 2 | 2022 |
| Variation aware design of controlled voltage swing ring oscillator AJ Mondal, J Talukdar, BK Bhattacharyya International Journal of Electronics 107 (1), 99-124, 2020 | 2 | 2020 |
| An improved TIQ comparator based 3-bit flash ADC J Talukdar, B Das 2017 1st International Conference on Electronics, Materials Engineering and …, 2017 | 2 | 2017 |
| A Simulation Study of the Effect of Trap Charges and Temperature on Performance of Dual Metal Strip Double Gate TFET K Nikhil, KMC Babu, J Talukdar, E Goel Silicon 16 (2), 525-534, 2024 | 1 | 2024 |
| Highly sensitivity Non-Uniform Tunnel FET based biosensor using source engineering J Talukdar, G Rawat, K Mummaneni Materials Science and Engineering: B 293, 116455, 2023 | 1 | 2023 |
| A simulation study of the effect of ferroelectric thickness and oxide variation on the performance of Highly Doped Double Pocket Double Gate NCFET based inverter M Malvika, J Talukdar, B Choudhuri, K Mummaneni 2022 IEEE International Symposium on Smart Electronic Systems (iSES), 601-604, 2022 | 1 | 2022 |
| A reliability study of Non-uniform Si TFET with dual material source: Impact of interface trap charges and temperature J Talukdar, K Mummaneni Silicon 14 (9), 4515-4521, 2022 | 1 | 2022 |
Gopal RawatAssistant Professor, IIT Mandi, IndiaVerified email at iitmandi.ac.in
