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G.Chitrakala
G.Chitrakala
Associate Professor, Department of EEE, E.G.S. Pillay Engineering College, Nagapattinam
Verified email at egspec.org
Title
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Cited by
Year
A Segmented Ladder-Structured Multilevel Inverter for Switch Count Remission and Dual-Mode Savvy
G Chitrakala, N Stalin, V Mohan
Journal of Circuits, Systems and Computers 27 (14), 1850223 (1-14), 2018
182018
Normally Bypassed Cascaded Sources Multilevel Inverter with RGA Optimization for Reduced Output Distortion and Formulaic Passive Filter Design
G Chitrakala, N Stalin, V Mohan
Journal of Circuits, Systems and Computers, 2050019, 2019
162019
A Low Frequency PWM Based Multilevel DC-Link Inverter with Cascaded Sources
V Mohan, G Chitrakala, N Stalin
Asian Journal of Research in Social Sciences and Humanities 7 (1), 686-697, 2017
102017
A Novel Programmed Low Frequency PWM Method for Performance Enhancement of Single Phase to Single Phase Cycloconverter
G. Chitrakala, N. Stalin, V. Mohan
CiiT International Journal of Digital Image Processing 9 (2), 39-46, 2017
6*2017
Improvement of power quality by controlling of reactive power using thyristoroid control of tap changer to the grid connected system
Chitrakala, G, Ganesan, G, Baladuraikannan, PIDT, Parameswaran
CiiT International Journal of Programmable Device Circuits and Systems 3 (9 …, 2011
2011
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