| 2-D Analytical Modeling of the Electrical Characteristics of Dual-Material Double-Gate TFETs With a SiO2/HfO2 Stacked Gate-Oxide Structure S Kumar, E Goel, K Singh, B Singh, PK Singh, K Baral, S Jit IEEE Transactions on Electron Devices 64 (3), 960-968, 2017 | 167 | 2017 |
| A Compact 2-D Analytical Model for Electrical Characteristics of Double-Gate Tunnel Field-Effect Transistors With a SiO2/High-Stacked Gate-Oxide Structure S Kumar, E Goel, K Singh, B Singh, M Kumar, S Jit IEEE Transactions on Electron Devices 63 (8), 3291-3299, 2016 | 142 | 2016 |
| 2-D analytical modeling of threshold voltage for graded-channel dual-material double-gate MOSFETs E Goel, S Kumar, K Singh, B Singh, M Kumar, S Jit IEEE Transactions on Electron Devices 63 (3), 966-973, 2016 | 108 | 2016 |
| Extended-source double-gate tunnel FET with improved DC and analog/RF performance T Joshi, Y Singh, B Singh IEEE Transactions on Electron Devices 67 (4), 1873-1879, 2020 | 84 | 2020 |
| Analytical modeling of channel potential and threshold voltage of double-gate junctionless FETs with a vertical Gaussian-like doping profile B Singh, D Gola, K Singh, E Goel, S Kumar, S Jit IEEE Transactions on Electron Devices 63 (6), 2299-2305, 2016 | 74 | 2016 |
| 2-D Analytical Drain Current Model of Double-Gate Heterojunction TFETs With a SiO2/HfO2 Stacked Gate-Oxide Structure S Kumar, K Singh, S Chander, E Goel, PK Singh, K Baral, B Singh, S Jit IEEE Transactions on Electron Devices 65 (1), 331-338, 2017 | 69 | 2017 |
| Simulation study of dielectric modulated dual channel trench gate TFET-based biosensor S Kumar, Y Singh, B Singh, PK Tiwari IEEE Sensors Journal 20 (21), 12565-12573, 2020 | 52 | 2020 |
| Dielectric pocket double gate junctionless FET: a new MOS structure with improved subthreshold characteristics for low power VLSI applications B Singh, D Gola, E Goel, S Kumar, K Singh, S Jit Journal of Computational Electronics 15 (2), 502-507, 2016 | 39 | 2016 |
| 2-D analytical threshold voltage model for dielectric pocket double-gate junctionless FETs by considering source/drain depletion effect B Singh, D Gola, K Singh, E Goel, S Kumar, S Jit IEEE Transactions on Electron Devices 64 (3), 901-908, 2017 | 38 | 2017 |
| Subthreshold modeling of tri-gate junctionless transistors with variable channel edges and substrate bias effects D Gola, B Singh, PK Tiwari IEEE Transactions on Electron Devices 65 (5), 1663-1671, 2018 | 31 | 2018 |
| A threshold voltage model of tri-gate junctionless field-effect transistors including substrate bias effects D Gola, B Singh, PK Tiwari IEEE Transactions on Electron Devices 64 (9), 3534-3540, 2017 | 27 | 2017 |
| Analytical modeling of subthreshold characteristics of ion-implanted symmetric double gate junctionless field effect transistors B Singh, D Gola, K Singh, E Goel, S Kumar, S Jit Materials science in semiconductor processing 58, 82-88, 2017 | 26 | 2017 |
| Static and quasi-static drain current modeling of tri-gate junctionless transistor with substrate bias-induced effects D Gola, B Singh, J Singh, S Jit, PK Tiwari IEEE Transactions on Electron Devices 66 (7), 2876-2883, 2019 | 25 | 2019 |
| Dual‐channel trench‐gate tunnel FET for improved ON‐current and subthreshold swing T Joshi, Y Singh, B Singh Electronics Letters 55 (21), 1152-1155, 2019 | 21 | 2019 |
| Ferro-electric stacked gate oxide heterojunction electro-statically doped source/drain double-gate tunnel field effect transistors: A superior structure B Singh, TN Rai, D Gola, K Singh, E Goel, S Kumar, PK Tiwari, S Jit Materials Science in Semiconductor Processing 71, 161-165, 2017 | 19 | 2017 |
| Analytical model of dielectric modulated trench double gate junctionless FET for biosensing applications S Kumar, B Singh, Y Singh IEEE Sensors Journal 21 (7), 8896-8902, 2021 | 18 | 2021 |
| Subthreshold Characteristic Analysis and Models for Tri-Gate SOI MOSFETs Using Substrate Bias Induced Effects D Gola, B Singh, PK Tiwari IEEE Transactions on Nanotechnology 18, 329-335, 2019 | 18 | 2019 |
| Controlling the ambipolar current in ultrathin SOI tunnel FETs using the back-bias effect T Joshi, B Singh, Y Singh Journal of Computational Electronics 19 (2), 658-667, 2020 | 15 | 2020 |
| A new trench double gate junctionless FET: a device for switching and analog/RF applications A Garg, B Singh, Y Singh AEU-International Journal of Electronics and Communications 118, 153140, 2020 | 13 | 2020 |
| Two-dimensional model for subthreshold current and subthreshold swing of graded-channel dual-material double-gate (GCDMDG) MOSFETs E Goel, S Kumar, B Singh, K Singh, S Jit Superlattices and Microstructures 106, 147-155, 2017 | 13 | 2017 |
