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Dayasagar Chowdary S
Dayasagar Chowdary S
Assistant Professor (Junior), Department of ECE, SENSE, VIT University, Vellore.
Verified email at vit.ac.in
Title
Cited by
Cited by
Year
Analysis of active and passive power filters for power quality improvement under different load conditions
BV Ramana, SD Chowdary, GV Ratnam
International Journal of Advanced Research in Electrical, Electronics and …, 2014
152014
Implementation of SPI Communication Protocol for Multipurpose Applications with I2C Power and Area Reduction
M Jyothi, LR Chandra, M Sahithi, SDS Chowdary, K Rajasekhar, ...
International Journal of Engineering Research and Applications-IJERA, ISSN …, 2012
122012
Multi-objective floorplanning optimization engaging dynamic programming for system on chip
D Chowdary, MS Sudhakar
Microelectronics Journal 140, 105942, 2023
42023
Linear programming-based multi-objective floorplanning optimization for system-on-chip
S Dayasagar Chowdary, MS Sudhakar
The Journal of Supercomputing, 1-24, 2023
12023
Low Power Full Swing XOR and XNOR Structures for Full Adder Circuits
AS Kumar, SD Chowdary
EPRA International Journal of Research and Development 4 (7), 102-107, 2019
12019
Implementation of 180nm CMOS Linear Feedback Shift Register (LFSR) ASIC for Data Encryption and Decryption
F Noorbasha, SD Chowdary, KH Kishore, S Moulali
CiiT International Journal of Programmable Device Circuits and Systems 4 (5 …, 2012
12012
Design and implementation of advanced 32bit pipelined RISC processor for multipurpose applications
J Poornima, GV Ganesh, GV Rao, SD Sagar
International Journal of VLSI & Signal Processing Applications 2, 153-159, 0
1
Lossless and Reversible Data Hiding In Encrypted Images with Public Key Cryptography
SDSC Konchada Nanda Kishore
International Journal of Innovative Research in Technology 5 (5), 22 - 25, 2018
2018
A NEW APPROACH OF PERFORMANCE ANALYSIS FOR FFT BASED MIMOOFDM WITH DWT BASED MIMO-OFDM
SDSC KELLA SURENDRA
International Journal Of Global Innovations 5 (II), 175-178, 2016
2016
3-D Feature Plots and Pattern Detection of Various Non-sationary Signal’s Using FWNN
ALGNA A.Jaya Prakash, S .Daya Sagar Chowdary, M.S.Vamsi Krishna
International Journal of Electronics & Communication Technology 5 (3), 9-12, 2014
2014
VLSI Implementation of Densely Packed Decimal Converter to and from Binary Coded Decimal using Reversible Logic Gates
NNS S. Rahil Hussian, V. Narasimha Nayak, Dr.Fazal Noorbasha, S. Dayasagar ...
International Journal of Engineering Research and Applications (IJERA) 2 (3 …, 2012
2012
Implementation of Low Power Consumed 64-Bit RISC Processor Using Clock Gating
F Noorbasha, S Moulali, SD Chowdary
Programmable Device Circuits and Systems, 307-313, 2012
2012
Sram Cell Static Faults Detection and Repair Using Memory Bist
KHK Shaik Moulali* , Dr. Fazal Noor Bhasha, B.Srinivas, S.Dayasagar chowdary ...
International Journal of Computer Science and Information Technologies 3 (1 …, 2012
2012
Effective and Implementing of Hypothesis Testing in Scientific Research.
C Anbalagan, SR Hussain, SD Chowdary
CLEAR International Journal of Research in Science & Technology 1 (2), 2011
2011
CFO Estimation & PAPR Estimation for OFDM/OQAM Systems
SDSC Mangipudi Chandra Sekhar
Invisible QR Code Watermarking Algorithm Using Lifting Based DWT
SDSC Gudla Bhanu Gupta
ADAPTIVE DS-CDMA RECEIVER WITH CODE TRACING IN A DISTINCT PERIOD OF UNSPECIFIED ENVIRONMENTS
A Joga Rao, SDS Chowdary
Efficient Utilization of Time for Fast Multipliers Using Twin Precision Technique in DSP
KR M.Sahithi, Naseema Shaik, S. Dayasagar Chowdary, M. Jyothi, J.Poornima
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