| From high-level deep neural models to FPGAs H Sharma, J Park, D Mahajan, E Amaro, JK Kim, C Shao, A Mishra, ... 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 608 | 2016 |
| Bit fusion: Bit-level dynamically composable architecture for accelerating deep neural network H Sharma, J Park, N Suda, L Lai, B Chau, JK Kim, V Chandra, ... 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 563 | 2018 |
| Tabla: A unified template-based framework for accelerating statistical machine learning D Mahajan, J Park, E Amaro, H Sharma, A Yazdanbakhsh, JK Kim, ... 2016 IEEE International Symposium on High Performance Computer Architecture …, 2016 | 201 | 2016 |
| Neural acceleration for GPU throughput processors A Yazdanbakhsh, J Park, H Sharma, P Lotfi-Kamran, H Esmaeilzadeh Proceedings of the 48th international symposium on microarchitecture, 482-493, 2015 | 128 | 2015 |
| Planaria: Dynamic architecture fission for spatial multi-tenant acceleration of deep neural networks S Ghodrati, BH Ahn, JK Kim, S Kinzer, BR Yatham, N Alla, H Sharma, ... 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 97 | 2020 |
| Dnnweaver: From high-level deep network models to fpga acceleration H Sharma, J Park, E Amaro, B Thwaites, P Kotha, A Gupta, JK Kim, ... the Workshop on Cognitive Architectures, 2016 | 73 | 2016 |
| Scale-out acceleration for machine learning J Park, H Sharma, D Mahajan, JK Kim, P Olds, H Esmaeilzadeh Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017 | 62 | 2017 |
| Mixed-signal charge-domain acceleration of deep neural networks through interleaved bit-partitioned arithmetic S Ghodrati, H Sharma, S Kinzer, A Yazdanbakhsh, J Park, NS Kim, ... Proceedings of the ACM International Conference on Parallel Architectures …, 2020 | 28 | 2020 |
| Bit-parallel vector composability for neural acceleration S Ghodrati, H Sharma, C Young, NS Kim, H Esmaeilzadeh 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 22 | 2020 |
| Systems, apparatus, methods, and architecture for precision heterogeneity in accelerating neural networks for inference and training H Sharma, J Park US Patent App. 16/744,037, 2020 | 13 | 2020 |
| Processing artificial neural network weights AE Chalfin, H Sharma, TJ Olson US Patent 10,599,935, 2020 | 13 | 2020 |
| Systems, apparatus, methods, and architectures for heterogeneous precision acceleration of quantized neural networks H Sharma, J Park US Patent App. 16/744,039, 2020 | 7 | 2020 |
| {CoVA}: Exploiting {Compressed-Domain} analysis to accelerate video analytics J Hwang, M Kim, D Kim, S Nam, Y Kim, D Kim, H Sharma, J Park 2022 USENIX Annual Technical Conference (USENIX ATC 22), 707-722, 2022 | 6 | 2022 |
| Systems, apparatus, methods, and architectures for a neural network workflow to generate a hardware accelerator H Sharma, J Park US Patent 11,321,606, 2022 | 5 | 2022 |
| Hardware acceleration pipeline with filtering engine for column-oriented database management systems with arbitrary scheduling functionality H Sharma, M Brzozowski, B Samynathan US Patent App. 16/988,650, 2021 | 5 | 2021 |
| The impact of 3D stacking on GPU-accelerated deep neural networks: An experimental study W Wahby, T Sarvey, H Sharma, H Esmaeilzadeh, MS Bakir 2016 IEEE International 3D Systems Integration Conference (3DIC), 1-4, 2016 | 4 | 2016 |
| DnnWeaver v2. 0: From tensors to FPGAs H Sharma, J Park, B Samynathan, B Robatmili, S Mirkhani, ... Memory2. 1 (), 3, 2016 | 3 | 2016 |
| Domain-specific computational storage for serverless computing R Mahapatra, S Ghodrati, BH Ahn, S Kinzer, S Wang, H Xu, L Karthikeyan, ... arXiv preprint arXiv:2303.03483, 2023 | 1 | 2023 |
| Accelerated deep learning for the edge-to-cloud continuum: A specialized full stack derived from algorithms H Sharma Georgia Institute of Technology, 2019 | 1 | 2019 |
| From Tensors to FPGAs: Accelerating Deep Learning H Sharma, J Park, B Samynathan, B Robatmili, S Mirkhani, ... Hot Chips: Symposium on High Performance Chips. IEEE/ACM, 2018 | 1 | 2018 |
Hadi EsmaeilzadehAssociate Professor; Computer Science and Engineering; University of California, San DiegoVerified email at eng.ucsd.edu
