N. Nalla Anandakumar
TitleCited byYear
A very compact FPGA implementation of LED and PHOTON
NN Anandakumar, T Peyrin, A Poschmann
International Conference on Cryptology in India, 304-321, 2014
162014
Compact implementations of FPGA-based PUFs with enhanced performance
NN Anandakumar, MS Hashmi, SK Sanadhya
2017 30th International Conference on VLSI Design and 2017 16th …, 2017
62017
Correlation power analysis attack of AES on FPGA using customized communication protocol
NN Anandakumar, S Dillibabu
Proceedings of the Second International Conference on Computational Science …, 2012
22012
Key Retrieval from AES Architecture Through Hardware Trojan Horse
S Manivannan, NN Anandakumar, MN Devi
International Symposium on Security in Computing and Communication, 483-494, 2018
12018
SCA Resistance Analysis on FPGA Implementations of Sponge Based MAC−PHOTON
N Nalla Anandakumar
International Conference for Information Technology and Communications 9522 …, 2015
1*2015
Countermeasures Against DPA Attacks on FPGA Implementation of AES
GD Babu, NN Anandakumar, D Muralidharan
Journal of Artificial Intelligence 5 (4), 186, 2012
12012
FPGA-Based True Random Number Generation Using Programmable Delays in Oscillator-Rings
NN Anandakumar, SK Sanadhya, MS Hashmi
IEEE Transactions on Circuits and Systems II: Express Briefs, 2019
2019
Reconfigurable Hardware Architecture for Authenticated Key Agreement Protocol Over Binary Edwards Curve
NN Anandakumar, M Das, SK Sanadhya, MS Hashmi
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 11 (2), 12, 2018
2018
Survey and analysis of hardware cryptographic and steganographic systems on FPGA.
GD Babu, NN Anandakumar, D Muralidharan, A Satoh, A Satoh, ...
Journal of Artificial Intelligence 5 (4), pp: 239-254, 2007
2007
A very small FPGA implementation of application-specific instruction processor for AES.
T Jun, W Liejun, ZG Cao, GD Babu, NN Anandakumar, D Muralidharan, ...
Information Technology Journal 12 (7), 1461-1465, 2006
2006
Design and Optimized Implementation of Six-Operand Single-Precision Floating-Point Addition
NN Anandakumar, S Annadurai
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Articles 1–11