Vinamra Benara
Vinamra Benara
PhD student, UC Berkeley
Verified email at - Homepage
Cited by
Cited by
Accurus: A fast convergence technique for accuracy configurable approximate adder circuits
V Benara, S Purini
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 577-582, 2016
Synthesizing Power and Area Efficient Image Processing Pipelines on FPGAs using Customized Bit-widths
V Benara, Z Choudhury, S Purini, U Bondhugula
arXiv preprint arXiv:1803.02660, 2018
Bitwidth customization in image processing pipelines using interval analysis and SMT solvers
S Purini, V Benara, Z Choudhury, U Bondhugula
Proceedings of the 29th International Conference on Compiler Construction …, 2020
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Articles 1–3