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Vinamra Benara
Vinamra Benara
PhD student, UC Berkeley
Verified email at berkeley.edu - Homepage
Title
Cited by
Cited by
Year
Accurus: A fast convergence technique for accuracy configurable approximate adder circuits
V Benara, S Purini
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 577-582, 2016
172016
Bitwidth customization in image processing pipelines using interval analysis and SMT solvers
S Purini, V Benara, Z Choudhury, U Bondhugula
Proceedings of the 29th International Conference on Compiler Construction†…, 2020
42020
RAG vs Fine-tuning: Pipelines, Tradeoffs, and a Case Study on Agriculture
A Balaguer, V Benara, RL de Freitas Cunha, RM Estev„o Filho, T Hendry, ...
arXiv e-prints, arXiv: 2401.08406, 2024
12024
NumS: Scalable Array Programming for the Cloud
M Elibol, V Benara, S Yagati, L Zheng, A Cheung, MI Jordan, I Stoica
arXiv preprint arXiv:2206.14276, 2022
12022
Synthesizing Power and Area Efficient Image Processing Pipelines on FPGAs using Customized Bit-widths
V Benara, Z Choudhury, S Purini, U Bondhugula
arXiv preprint arXiv:1803.02660, 2018
12018
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