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Dr SUDHANSU  MOHAN BISWAL
Dr SUDHANSU MOHAN BISWAL
Verified email at silicon.ac.in
Title
Cited by
Cited by
Year
Study of effect of gate-length downscaling on the analog/RF performance and linearity investigation of InAs-based nanowire Tunnel FET
SM Biswal, B Baral, D De, A Sarkar
Superlattices and Microstructures 91, 319-330, 2016
462016
Performance analysis of gate-stack dual-material DG MOSFET using work-function modulation technique for lower technology nodes
SK Das, U Nanda, SM Biswal, CK Pandey, LI Giri
Silicon 14 (6), 2965-2973, 2022
282022
Analytical subthreshold modeling of dual material gate engineered nano-scale junctionless surrounding gate MOSFET considering ECPE
SM Biswal, B Baral, D De, A Sarkar
Superlattices and Microstructures 82, 103-112, 2015
282015
Simulation and comparative study on analog/RF and linearity performance of III–V semiconductor-based staggered heterojunction and InAs nanowire (nw) Tunnel FET
SM Biswal, B Baral, D De, A Sarkar
Microsystem Technologies 25, 1855-1861, 2019
252019
Smart power theft detection system
NK Mucheli, U Nanda, D Nayak, PK Rout, SK Swain, SK Das, SM Biswal
2019 Devices for Integrated Circuit (DevIC), 302-305, 2019
182019
Physicochemical properties of glimepiride in solid dispersions with polyethylene glycol 20000
OPB Singh, S Biswal, J Sahoo, PN Murthy
International Journal of Pharmaceutical Sciences and Nanotechnology (IJPSN …, 2009
182009
Evaluation of anti-inflammatory activity of ethanolic extract of Sphaeranthus indicus
BR Meher, BG Rath, S Biswal
J Chem Pharm Res 3 (3), 831-4, 2011
132011
Effect of high-K spacer on the performance of non-uniformly doped DG-MOSFET
SK Swain, SK Das, SM Biswal, S Adak, U Nanda, AA Sahoo, D Navak, ...
2019 Devices for Integrated Circuit (DevIC), 510-514, 2019
112019
Radio frequency/analog and linearity performance of a junctionless double gate metal–oxide–semiconductor field-effect transistor
B Baral, SM Biswal, D De, A Sarkar
Simulation 93 (11), 985-993, 2017
112017
Study of analog/Rf and stability investigation of surrounded gate junctionless graded channel MOSFET (SJLGC MOSFET)
S Misra, SM Biswal, B Baral, SK Swain, SK Pati
Silicon, 1-12, 2021
92021
The emergence of subclades A1 and A3 avipoxviruses in India
BP Sahu, P Majee, C Mishra, M Dash, S Biswal, N Sahoo, D Nayak
Transboundary and emerging diseases 67 (2), 510-517, 2020
92020
Performance analysis of gate stack DG-MOSFET for biosensor applications
SK Parija, SK Swain, SM Biswal, S Adak, P Dutta
Silicon 14 (14), 8371-8379, 2022
72022
Comparison study of dg-mosfet with and without gate stack configuration for biosensor applications
SK Parija, SK Swain, S Adak, SM Biswal, P Dutta
Silicon 14 (7), 3629-3640, 2022
72022
Study on analog/RF and linearity performance of staggered heterojunction gate stack tunnel FET
SM Biswal, SK Das, S Misra, U Nanda, B Jena
ECS Journal of Solid State Science and Technology 10 (7), 073001, 2021
72021
A Comparative Study of junctionless triple-material cylindrical surrounding gate tunnel FET
SM Biswal, SK Swain, JR Sahoo, AK Swain, K Routaray, U Nanda, ...
Microelectronics, Electromagnetics and Telecommunications: Proceedings of …, 2019
72019
Comparative study on analog & RF parameter of InALN/AlN/GaN normally off HEMTs with and without AlGAN back barrier
N Chand, SK Swain, SM Biswal, A Sarkar, S Adak
2021 Devices for Integrated Circuit (DevIC), 616-620, 2021
62021
Design and performance analysis of current starved voltage controlled oscillator
U Nanda, D Nayak, SK Pattnaik, SK Swain, SM Biswal, B Biswal
Microelectronics, Electromagnetics and Telecommunications: Proceedings of …, 2019
62019
The synthesis and FTIR, kinetics and TG/DTG/DTA study of inter penetrating polymer networks (IPNs) derived from polyurethanes of glycerol modified castor oil and cardanol based …
S Biswal, JR Satapathy, PGR Achary, NC Pal
Journal of Polymers and the Environment 20, 788-793, 2012
62012
Influence of oxide thickness variation on analog and RF performances of SOI FinFET
D Tripathy, DP Acharya, PK Rout, SM Biswal
Facta Universitatis, Series: Electronics and Energetics 35 (1), 001-011, 2022
52022
Effect of Gate Length Downscaling on RF/Analog and Linearity Performance of a Junctionless Double Gate MOSFET for Analog/Mixed Signal System-On-Chip Applications It’s …
B Baral, SM Biswal, J Padhee, D De, A Sarkar
Advances in Industrial Engineering and Management 5 (1), 130-137, 2016
42016
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