RAJDEEP MUKHERJEE
RAJDEEP MUKHERJEE
D.Phil Student
Verified email at cs.ox.ac.uk - Homepage
TitleCited byYear
Hardware verification using software analyzers
R Mukherjee, D Kroening, T Melham
2015 IEEE Computer Society Annual Symposium on VLSI, 7-12, 2015
212015
Formal Techniques for Effective Co-verification of Hardware/Software Co-designs
R Mukherjee, M Purandare, R Polig, D Kroening
Design Automation Conference, 35:1--35:6, 2017
112017
v2c–A verilog to C translator
R Mukherjee, M Tautschnig, D Kroening
International Conference on Tools and Algorithms for the Construction and …, 2016
102016
Power-tructor: An integrated tool flow for formal verification and coverage of architectural power intent
A Hazra, R Mukherjee, P Dasgupta, A Pal, KM Harer, A Banerjee, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013
92013
Formal verification of hardware/software power management strategies
R Mukherjee, P Dasgupta, A Pal, S Mukherjee
2013 26th International Conference on VLSI Design and 2013 12th …, 2013
92013
Efficient verification of multi-property designs (The benefit of wrong assumptions)
E Goldberg, M Gudemann, D Kroening, R Mukherjee
Design, Automation & Test in Europe Conference, DATE, 43--48, 2018
62018
Equivalence checking of a floating-point unit against a high-level C model
R Mukherjee, S Joshi, A Griesmayer, D Kroening, T Melham
International Symposium on Formal Methods, 551-558, 2016
42016
Equivalence checking using trace partitioning
R Mukherjee, D Kroening, T Melham, M Srivas
2015 IEEE Computer Society Annual Symposium on VLSI, 13-18, 2015
42015
Formal hardware/software co-verification of embedded power controllers
P Dasgupta, MK Srivas, R Mukherjee
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014
32014
Operator scheduling revisited: A multi-objective perspective for fine-grained DVS architecture
R Mukherjee, P Ghosh, P Dasgupta, A Pal
Advances in Computing and Information Technology, 633-648, 2013
32013
Lifting CDCL to Template-based Abstract Domains for Program Verification
R Mukherjee, P Schrammel, L Haller, D Kroening, T Melham
Automated Technology for Verification and Analysis, 2017
22017
Unbounded safety verification for hardware using software analyzers
R Mukherjee, P Schrammel, D Kroening, T Melham
Proceedings of the 2016 Conference on Design, Automation & Test in Europe …, 2016
22016
Equivalence Checking a Floating-point Unit against a High-level C Model (Extended Version)
R Mukherjee, S Joshi, A Griesmayer, D Kroening, T Melham
arXiv preprint arXiv:1609.00169, 2016
12016
A multi-objective perspective for operator scheduling using fine-grained DVS architecture
R Mukherjee, P Ghosh, P Dasgupta, A Pal
arXiv preprint arXiv:1303.1645, 2013
12013
Multi-objective low-power CDFG scheduling using fine-grained DVS architecture in distributed framework
R Mukherjee, P Ghosh, NS Kumar, P Dasgupta, A Pal
2012 International Symposium on Electronic System Design (ISED), 267-271, 2012
12012
HotSpot minimization using fine-grained DVS architecture at 90 nm technology
R Mukherjee, P Ghosh, A Pal
2012 Asia Pacific Conference on Postgraduate Research in Microelectronics …, 2012
12012
Learning framework for software-hardware model generation and verification
R Mukherjee, R Polig, M Purandare
US Patent App. 15/709,850, 2019
2019
StationPlot: A New Non-stationarity Quantification Tool for Detection of Epileptic Seizures
S Pratiher, S Chattoraj, R Mukherjee
2018 IEEE Global Conference on Signal and Information Processing (GlobalSIP …, 2018
2018
Efficacy of deep convolutional neural network features on histological manifold for robust breast carcinoma detection
S Chattoraj, S Pratiher, R Mukherjee, S Ghosh, A Chakraborty, D Hazra, ...
Optics in Health Care and Biomedical Optics VIII 10820, 108203Q, 2018
2018
Precise abstract interpretation of hardware designs
R Mukherjee
University of Oxford, 2018
2018
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