Dr Priyesh Gandhi (PhD)
Dr Priyesh Gandhi (PhD)
Principal Sigma Institute of Engineering Vadodara
Verified email at sigma.ac.in
Title
Cited by
Cited by
Year
Implementation of CMOS charge sharing dynamic latch comparator in 130nm and 90nm technologies
DN Kapadia, PP Gandhi
2013 IEEE Conference on Information & Communication Technologies, 16-20, 2013
152013
Four quadrant analog multiplier with VCVS in deep-submicron technology
NB Modi, PP Gandhi
2013 IEEE Conference on Information & Communication Technologies, 1091-1094, 2013
92013
Fpga implementation of artificial neural network
HH Makwana, DJ Shah, PP Gandhi
International Journal of Emerging Technology and Advanced Engineering 3 (1 …, 2013
72013
A novel low offset low power CMOS dynamic comparator
PP Gandhi, NM Devashrayee
Analog Integrated Circuits and Signal Processing 96 (1), 147-158, 2018
62018
Design and implementation of numerical controlled oscillator on FPGA
NA Ranabhatt, S Agarwal, RK Bhattar, PP Gandhi
2013 Tenth International Conference on Wireless and Optical Communications …, 2013
52013
Design and comparative analysis of differential current sensing comparator in deep sub—Micron region
DN Kapadia, PP Gandhi
2013 IEEE Conference on Information & Communication Technologies, 21-25, 2013
42013
Characterization of CMOS Four Quadrant Analog Multiplier
NB Modi, PP Gandhi
International Journal of Engineering Research and Applications, 1276-1281, 2013
42013
Design & Simulation of Low Power High Speed CMOS Comparator in Deep Sub-micron Technology
PP Gandhi
M. Tech thesis, Dept. of electronics & communication Eng. Nirma University, 2010
42010
A 1.8 V 8-bit 100-MS/s Pipeline ADC in 0.18 μm CMOS Technology
BD Chaudhari, PP Gandhi
32014
Voltage Controlled Delay Line with PFD for Delay Locked Loop in CMOS 90nm Technology
KI Patel, PP Gandhi, ND Patel, J Prajapati
International Journal of Research in Electronics and Communication …, 2014
32014
High performance CMOS voltage comparator
PP Gandhi, NM Devashrayee
2013 Nirma University International Conference on Engineering (NUiCONE), 1-5, 2013
22013
Design & Characterization of High Speed Power Efficient CMOS Comparator
PP Gandhi, DN Kapadia, NM Devashrayee
International Journal of Electronics and Communication Engineering …, 2013
22013
RTL Design and Implementation of BPSK Modulation at Low Bit Rate
AR Nehal, S Agarwal, PG Priyesh
International Journal of Engineering Research & Technology (IJERT) 2 (2), 1-6, 2013
22013
Design and Simulation of High Speed CMOS Differential Current Sensing Comparator in 0.35 µm and 0.25 µm 1 Technologies
DN Kapadia, PP Gandhi
International journal of Electronics and Communication Engineering …, 2012
22012
Design and Implementation of 1-bit Pipeline ADC in 0.18 um CMOS Technology
BD Chaudhari, PP Gandhi
International Journal of Engineering Sciences & Research Technology, 1367-1371, 2014
12014
Acute Lymphoblastic Leukemia Detection Based on Low level Features and Random Forest Classifier
PG Sheshang Degadwala, Arpana Mahajan, Dhairya Vyas
International Journal of Grid and Distributed Computing 12 (3), 15-22, 2019
2019
Comparative Analysis of Phase Frequency Detector for Phase-Locked Loops
GR Modi, PP Gandhi, ND Patel
Journal of VLSI Design Tools & Technology 7 (1), 18-28, 2019
2019
Design of 8 Bit High Speed Pipelined ADC
SR Patel, PP Gandhi
Journal of VLSI Design Tools & Technology 5 (2), 71-80, 2019
2019
Comparative Analysis of High Speed Comparator for A to D Converters
P Gandhi, NB Rathod, NM Devashrayee
Journal of VLSI Design Tools & Technology 5 (2), 4-10, 2019
2019
Analysis and Design of High Speed Power Efficient Pipelined ADC
PP Gandhi
Journal of The Gujarat Research Society 21 (1), 106-110, 2019
2019
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Articles 1–20