| A scalable in-memory logic synthesis approach using memristor crossbar R Gharpinde, PL Thangkhiew, K Datta, I Sengupta IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (2), 355-366, 2017 | 73 | 2017 |
| Efficient mapping of Boolean functions to memristor crossbar using MAGIC NOR gates PL Thangkhiew, R Gharpinde, K Datta IEEE Transactions on Circuits and Systems I: Regular Papers 65 (8), 2466-2476, 2018 | 60 | 2018 |
| Area efficient implementation of ripple carry adder using memristor crossbar arrays PL Thangkhiew, R Gharpinde, PV Chowdhary, K Datta, I Sengupta 2016 11th International Design & Test Symposium (IDT), 142-147, 2016 | 39 | 2016 |
| Look-ahead mapping of Boolean functions in memristive crossbar array DN Yadav, PL Thangkhiew, K Datta Integration 64, 152-162, 2019 | 33 | 2019 |
| Scalable in-memory mapping of Boolean functions in memristive crossbar array using simulated annealing PL Thangkhiew, K Datta Journal of Systems Architecture 89, 49-59, 2018 | 25 | 2018 |
| Efficient implementation of adder circuits in memristive crossbar array PL Thangkhiew, R Gharpinde, DN Yadav, K Datta, I Sengupta TENCON 2017 - 2017 IEEE Region 10 Conference, Penang, Malaysia, 2017, 207-212, 2017 | 24 | 2017 |
| An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD) PL Thangkhiew, A Zulehner, R Wille, K Datta, I Sengupta Integration 71, 125-133, 2020 | 17 | 2020 |
| Imagin: Library of imply and magic nor-based approximate adders for in-memory computing CK Jha, PL Thangkhiew, K Datta, R Drechsler IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 8 …, 2022 | 11 | 2022 |
| Fast in-memory computation of Boolean functions in memristive crossbar array PL Thangkhiew, K Datta 2018 8th International Symposium on Embedded Computing and System Design …, 2018 | 5 | 2018 |
| Towards an in-memory reconfiguration of arithmetic logical unit using memristor crossbar array DN Yadav, PL Thangkhiew 2018 IEEE International Conference on Electronics, Computing and …, 2018 | 4 | 2018 |
| Should we even optimize for execution energy? rethinking mapping for magic design style S Singh, CK Jha, A Bende, PL Thangkhiew, V Rana, S Patkar, ... IEEE Embedded Systems Letters, 2023 | 3 | 2023 |
| Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles K Datta, S Shirinzadeh, PL Thangkhiew, I Sengupta, R Drechsler 2022 25th Euromicro Conference on Digital System Design (DSD), 793-800, 2022 | 2 | 2022 |
| Feed-Forward learning algorithm for resistive memories DN Yadav, PL Thangkhiew, K Datta, S Chakraborty, R Drechsler, ... Journal of Systems Architecture 131, 102730, 2022 | 1 | 2022 |
| FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications DN Yadav, PL Thangkhiew, K Datta, S Chakraborty, R Drechsler, ... Journal of Electronic Testing 38 (2), 145-163, 2022 | 1 | 2022 |
| An Overview of Different Approaches for Ternary Reversible Logic Circuits Synthesis Using Ternary Reversible Gates with Special Reference to Virtual Reality P Mercy Nesa Rani, PL Thangkhiew Advances in Augmented Reality and Virtual Reality, 73-90, 2022 | 1 | 2022 |
| An Analysis of Fault Diagnosis Approaches in Memristor Crossbar Array DN Yadav, PL Thangkhiew, I Sengupta 2023 IEEE International Symposium on Smart Electronic Systems (iSES), 242-247, 2023 | | 2023 |
| Efficient grouping approach for fault tolerant weight mapping in memristive crossbar array DN Yadav, PL Thangkhiew, S Chakraborty, I Sengupta Memories-Materials, Devices, Circuits and Systems 4, 100045, 2023 | | 2023 |
| Synthesis and Mapping of Boolean Function to Memristive Crossbar Array PL Thangkhiew Shillong, 0 | | |
