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International Journal of VLSI design & Communication Systems (VLSICS)
International Journal of VLSI design & Communication Systems (VLSICS)
AIRCC Publishing Corporation
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Title
Cited by
Cited by
Year
Area, Delay and Power Comparison of Adder Topologies
SP R.UMA,Vidya Vijayan, M. Mohanapriya
International journal of VLSI design & Communication Systems (VLSICS) 3 (01…, 2012
162*2012
Low Power Reversible Parallel Binary Adder/Subtractor
RKB Rangaraju H G, Venugopal U, Muralidhara K N
International journal of VLSI design & Communication Systems (VLSICS) 1 (03…, 2010
87*2010
Comparative Performance Analysis of XORXNOR Function Based High-Speed CMOS Full Adder Circuits For Low Voltage VLSI Design
ST Subodh Wairya, Rajendra Kumar Nagaria
International journal of VLSI design & Communication Systems (VLSICS) 3 (02…, 2012
59*2012
An Efficient FPGA Implemenation of MRI Image Filtering and Tumour Characterization Using XILINX System Generator
DAK Mrs. S. Allin Christe, Mr.M.Vignesh
International journal of VLSI design & Communication Systems (VLSICS) 2 (04…, 2011
57*2011
Arithmetic Operations in Multi-Valued Logic
k s gurumurthy Vasundara Patel
International journal of VLSI design & Communication Systems (VLSICS) 1 (01…, 2010
50*2010
Single bit full adder design using 8 transistors with novel 3 transistors XNOR gate
SP Manoj Kumar, Sandeep K. Arya
International journal of VLSI design & Communication Systems (VLSICS) 2 (04…, 2011
48*2011
Finite State Machine based Vending Machine Controller with Auto-Billing Features
BS Ana Monga
International journal of VLSI design & Communication Systems (VLSICS) 3 (02…, 2012
452012
New Design Methodologies for High-Speed Mixed-Mode CMOS Full Adder Circuits
ST Subodh Wairya, Rajendra Kumar Nagaria
International journal of VLSI design & Communication Systems (VLSICS) 2 (02…, 2011
43*2011
Leakage Power Reduction and Analysis of CMOS Sequential Circuits
SM M. Janaki Rani
International journal of VLSI design & Communication Systems (VLSICS) 3 (01…, 2012
42*2012
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis
MEU Md. Belayet Ali, Md. Mosharof Hossin
International journal of VLSI design & Communication Systems (VLSICS) 2 (04…, 2011
42*2011
A New Approach to Design Low Power CMOS Flash A/D Converter
RC Sudakar S. Chauhan, S. Manabala, S.C. Bose
International journal of VLSI design & Communication Systems (VLSICS) 2 (02…, 2011
38*2011
Physical Scaling Limits of FinFET Structure: A Simulation Study
AKR Gaurav Saini
International journal of VLSI design & Communication Systems (VLSICS) 2 (01…, 2011
382011
Single Electron Transistor: Applications & Problems
MK Om Kumar
International journal of VLSI design & Communication Systems (VLSICS) 1 (04…, 2010
372010
Power Comparison of CMOS and Adiabatic Full Adder Circuits
VVGSRP Y. Sunil Gavaskar Reddy
International journal of VLSI design & Communication Systems (VLSICS) 2 (03…, 2011
36*2011
Cell Stability Analysis of Conventional 6T Dynamic 8T SRAM Cell in 45NM Technology
DKP K. Dhanumjaya, M. Sudha, Dr.MN.Giri Prasad
International journal of VLSI design & Communication Systems (VLSICS) 3 (02…, 2012
33*2012
Design of a high frequency low voltage CMOS operational amplifier
P Kakoty
International journal of VLSI design & Communication Systems (VLSICS) 2 (01…, 2011
322011
Design of Reversible Multipliers for Linear Filtering Applications in DSP
RTR Rakshith Saligram
International Journal Of VLSI Design & Communication Systems ( VLSICS ) 3…, 2012
31*2012
A Review of the 0.09 m Standard Full Adders
PP V. Vijay , J. Prathiba , S. Niranjan Reddy
International journal of VLSI design & Communication Systems (VLSICS) 3 (03…, 2012
31*2012
Wishbone Bus Architecture - A Survey and Comparison
DK Mohandeep Sharma
International journal of VLSI design & Communication Systems (VLSICS) 3 (02…, 2012
31*2012
Design and Implementation of Analog Multiplier with Improved Linearity
DCS Nandini A.S, Sowmya Madhavan
International Journal Of VLSI Design & Communication Systems ( VLSICS ) 3…, 2012
30*2012
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