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DR. BIJOY KUMAR UPADHYAYA
DR. BIJOY KUMAR UPADHYAYA
Professor, Department of Electronics & Communication, Tripura Institute of Technology
Verified email at gov.in
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Cited by
Year
Power consumption analysis, measurement, management, and issues: A state-of-the-art review of smartphone battery and energy usage
PKD Pramanik, N Sinhababu, B Mukherjee, S Padmanaban, A Maity, ...
ieee Access 7, 182113-182172, 2019
1562019
Internet of things, smart sensors, and pervasive systems: Enabling connected and pervasive healthcare
PKD Pramanik, BK Upadhyaya, S Pal, T Pal
Healthcare data analytics and management, 1-58, 2019
1192019
Novel design of address generator for WiMAX multimode interleaver using FPGA based finite state machine
BK Upadhyaya, SM Iti, SK Sanyal
2010 13th International Conference on Computer and Information Technology …, 2010
432010
Ubiquitous manufacturing in the age of industry 4.0: a state-of-the-art primer
PKD Pramanik, B Mukherjee, S Pal, BK Upadhyaya, S Dutta
A roadmap to Industry 4.0: smart production, sharp business and Sustainable …, 2020
352020
VHDL modeling of convolutional interleaver-deinterleaver for efficient FPGA implementation
BK Upadhyaya, SK Sanyal
International Journal of Recent Trends in Engineering 2 (6), 66, 2009
272009
Efficient FPGA implementation of address generator for WiMAX deinterleaver
BK Upadhyaya, SK Sanyal
IEEE Transactions on Circuits and Systems II: Express Briefs 60 (8), 492-496, 2013
192013
Design of a novel FSM based reconfigurable multimode interleaver for WLAN application
BK Upadhyaya, SK Sanyal
2011 International Conference on Devices and Communications (ICDeCom), 1-5, 2011
182011
An improved LUT based reconfigurable multimode interleaver for WLAN application
BK Upadhyaya, SK Sanyal
Int. J. Recent Trends Eng. Tech., ACEEE 6 (2), 183-188, 2011
152011
Novel design of WiMAX multimode interleaver for efficient FPGA implementation using finite state machine based address generator
BK Upadhyaya, SK Sanyal
International Journal of Communications 6 (2), 27-36, 2012
122012
FPGA implementation of gradient based edge detection algorithms for real time image
BK Upadhyaya, D Chakraborty
2018 2nd international conference on trends in electronics and informatics …, 2018
32018
Design and Development of VHDL Based Tuneable Sine Wave Generator Using DDS Technique: Extension to FPGA Implementation
BK Upadhyaya
NCC 2009, 16-18, 2009
22009
Design of A Soft-Core Processor in FPGA
BK Upadhyaya
INTERNATIONAL JOURNAL OF ENGINEERING RESEARCH & TECHNOLOGY (IJERT) 12 (1 …, 2023
2023
Design of a Raspberry Pi Based Electronic Travel Assistant for Visually Impaired Persons
A Thapa, S Debbarma, BK Upadhyaya
IEEE Calcutta Conference (CALCON), pp. 261-266, 2022
2022
Design of FPGA-Based QPP Interleaver for LTE/LTE-Advanced Application
BK Upadhyaya, SK Sanyal
Computational Advancement in Communication, Circuits and Systems …, 2022
2022
High throughput resource efficient reconfigurable interleaver for MIMO WLAN application
BK Upadhyaya, PKD Pramanik, SK Sanyal
PeerJ Computer Science 7, e581, 2021
2021
VHDL modeling and efficient FPGA implementation of some interleavers for applications in OFDM based wireless communication systems
BK Upadhyaya
Jadavpur Univesity, Kolkata, West Bengal, 2015
2015
Memory Efficient LUT Based Address Generator for OFDM-WiMAX De-Interleaver
BK Upadhyaya, PK Goswami, SK Sanyal
International Journal of Electronics and Electrical Engineering 2 (1), pp. 31-35, 2014
2014
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