Jayanta Pal, Ph.D.
Jayanta Pal, Ph.D.
Assistant Professor, Department of Information Technology, Tripura University
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Cited by
Cited by
Realization of basic gates using universal gates using quantum-dot cellular automata
J Pal, P Dutta, AK Saha
Proceedings of the international conference on computing and communication …, 2018
Study on Temperature Stability and Fault Tolerance of Adder in Quantum-dot Cellular Automata
JP Shiboprosad Bhattacharjee, Apu Kumar Saha, Paramartha Dutta
5th International Conference on Signal Processing, Computing and Control …, 2019
Towards the realization of regular clocking-based QCA circuits using genetic algorithm
AK Pramanik, D Bhowmik, J Pal, P Sen, AK Saha, B Sen
Computers & Electrical Engineering 97, 107640, 2022
In memory computation using quantum-dot cellular automata
M Goswami, J Pal, MR Choudhury, PP Chougule, B Sen
IET Computers & Digital Techniques 14 (6), 336-343, 2020
An efficient, scalable, regular clocking scheme based on quantum dot cellular automata
J Pal, AK Pramanik, JS Sharma, AK Saha, B Sen
Analog Integrated Circuits and Signal Processing 107 (3), 659-670, 2021
Liveness detection using eye blink a case study
P Bhardwaj, S Debbarma, S Deb, N Debbarma, J Pal
International Journal of Application or Innovation in Engineering …, 2012
A modular approach to design ternary content addressable memory architecture in quantum dot cellular automata
M Goswami, J Pal, R Tanwar, P Rawat
International Journal of Information Technology 14 (1), 41-47, 2022
Regular Clocking based Emerging Technique in QCA Targeting Low Power Nano Circuit
J Pal, AK Pramanik, M Goswami, AK Saha, B Sen
International Journal of Electronics, 1-23, 2021
CFA: Toward the Realization of Conservative Full Adder in QCA with Enhanced Reliability
J Pal, M Goswami, AK Saha, B Sen
Journal of Circuits, Systems and Computers 30 (10), 2150172, 2021
Systematic cell placement in quantum‐dot cellular automata embedding underlying regular clocking circuit
D Bhowmik, J Pal, M Goswami, P Sen, AK Saha, B Sen
IET Circuits, Devices & Systems 15 (2), 156-167, 2021
Regular clocking scheme based design of cost-efficient comparator in QCA
J Pal, M Noorallahzadeh, JS Sharma, D Bhowmik, AK Saha, B Sen
Indonesian Journal of Electrical Engineering and Computer Science 21 (1), 44-55, 2021
Smart Irrigation System Using Internet of Things
M Bhattacharya, A Roy, J Pal
Applications of Internet of Things, 119-129, 2020
Impact of Genetic Algorithm on Low Power QCA Logic Circuit with Regular Clocking
AK Pramanik, J Pal, B Sen
Asian Symposium on Cellular Automata Technology, 191-203, 2022
Synthesis of composite logic gate in QCA embedding underlying regular clocking
J Pal, D Bhowmik, AR Singh, AK Saha, B Sen
Facta universitatis-series: Electronics and Energetics 34 (1), 115-131, 2021
Regular clocking-based Automated Cell Placement technique in QCA targeting sequential circuit
D Bhowmik, AK Pramanik, J Pal, P Sen, AR Singh, AK Saha, B Sen
Computers & Electrical Engineering 98, 107668, 2022
Performance Analysis of Regular Clocking Based Quantum-Dot Cellular Automata Logic Circuit: Fault Tolerant Approach
AK Pramanik, J Pal, BK Sikdar, B Sen
International Conference on Cellular Automata for Research and Industry, 185-198, 2022
QCA based design of cost-efficient code converter with temperature stability and energy efficiency analysis
D Bhowmik, J Pal, M Chandra, AK Saha, N Kumar
Materials Today: Proceedings 49, 3585-3594, 2022
Implementation of Composite Basic Gates using Quantum-dot Cellular Automata
J Pal, S Nandi, AK Saha, P Dutta
Recent Trends in Engineering and Technology (NCRTET-2017), 77, 2018
Quantum-dot Cellular Automata Based 2-to-4 Decoder using Layered T-Gate
JP Apu Kumar Saha, Paramartha Dutta
International Conference on Recent Trends in Mathematical Sciences (ICRTMS-2018), 2018
Design and Realization of Full Adder Using Quantum-dot Cellular Automata
JP Santanu Paul, Apu Kumar Saha, Paramartha Dutta
International Conference on Electrical, Electronics, Computers …, 2018
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