| Design and performance optimization of junctionless bottom spacer FinFET for digital/analog/RF applications at sub-5nm technology node S Valasa, KV Ramakrishna, N Vadthiya, S Bhukya, NB Rao, ... ECS Journal of Solid State Science and Technology 12 (1), 013004, 2023 | 11 | 2023 |
| Optimizing u-shape FinFETs for sub-5nm technology: performance analysis and device-to-circuit evaluation in digital and analog/radio frequency applications KV Ramakrishna, S Valasa, S Bhukya, N Vadthiya ECS Journal of Solid State Science and Technology 12 (9), 093007, 2023 | 7 | 2023 |
| Beyond Moore's law–A critical review of advancements in negative capacitance field effect transistors: A revolution in next-generation electronics S Valasa, VR Kotha, N Vadthiya Materials Science in Semiconductor Processing 173, 108116, 2024 | 3 | 2024 |
| A Proposal for Optimization of Spacer Engineering at Sub-5-nm Technology Node for JL-TreeFET: A Device to Circuit Level Implementation R Andavarapu, S Bagati, S Valasa, VR Kotha, S Bhukya, SK Padhi, ... IEEE Transactions on Electron Devices, 2023 | 2 | 2023 |
| Performance investigation of FinFET structures: unleashing multi-gate control through design and simulation at the 7 nm technology node for next-generation electronic devices S Valasa, KV Ramakrishna, S Bhukya, P Narware, V Bheemudu, ... ECS Journal of Solid State Science and Technology 12 (11), 113012, 2023 | 1 | 2023 |
| Pushing the Boundaries: Design and Simulation Approach of Negative Capacitance Nanosheet FETs with Ferroelectric and Dielectric Spacers at the Sub-3 nm Technology Node for … S Valasa, VR Kotha, N Vadthiya ACS Applied Electronic Materials, 2024 | | 2024 |
| Optimization of Sidewall Spacer Engineering at Sub-5 nm Technology Node For JL-Nanowire FET: Digital/Analog/RF/Circuit Perspective C Anguru, VK Aryasomayajula, VR Kotha, S Valasa, S Bhukya, ... ECS Journal of Solid State Science and Technology 13 (1), 013002, 2024 | | 2024 |
| Design Considerations into Circuit Applications for Structurally Optimised FinFET K Sarangam, S Valasa, PK Mudidhe, V Narendar, VR Kotha, S Bhukya, ... ECS Journal of Solid State Science and Technology 12 (12), 123007, 2023 | | 2023 |
| A Comparative Analysis of FinFET and Nanosheet FET based Circuits with Geometrical Parameter Variations at sub-5 nm technology node V Kothwal, S Valasa, VR Kotha, S Bhukya, N Vadthiya, B Vadthya 2023 IEEE 20th India Council International Conference (INDICON), 753-758, 2023 | | 2023 |
Sresta ValasaNational Institute of Technology WarangalVerified email at student.nitw.ac.in
