Defect characterization and testing of QCA devices and circuits: A survey V Dhare, U Mehta 2015 19th International Symposium on VLSI Design and Test, 1-2, 2015 | 22 | 2015 |
Quantum-dot cellular automata (QCA): a survey U Mehta, V Dhare arXiv preprint arXiv:1711.08153, 2017 | 21 | 2017 |
A simple synthesis process for combinational QCA circuits: QSynthesizer V Dhare, U Mehta 2019 32nd international conference on VLSI design and 2019 18th …, 2019 | 9 | 2019 |
Multiple missing cell defect modeling for QCA devices VH Dhare, US Mehta Journal of Electronic Testing 34, 623-641, 2018 | 8 | 2018 |
Development of basic fault model and corresponding ATPG for single input missing cell deposition defects in majority voter of QCA V Dhare, U Mehta 2016 IEEE Region 10 Conference (TENCON), 2354-2359, 2016 | 8 | 2016 |
Fault analysis of QCA combinational circuit at layout & logic level V Dhare, U Mehta 2015 IEEE International WIE Conference on Electrical and Computer …, 2015 | 7 | 2015 |
Single missing cell deposition defect analysis of sequential reversible circuit V Dhare, U Mehta 2017 Nirma University International Conference on Engineering (NUiCONE), 1-4, 2017 | 5 | 2017 |
Novel optimized ultra-dense 1-bit magnitude comparator design in quantum-dot cellular automata technology based on MV32 gate N Kandasamy, V Dhare, N Telagam The Journal of Supercomputing 78 (17), 18666-18690, 2022 | 4 | 2022 |
Development of controllability observability aided combinational ATPG with fault reduction V Dhare, U Mehta International Conference on Web and Semantic Technology, 682-692, 2010 | 4 | 2010 |
Test pattern generator for MV-based QCA combinational circuit targeting MMC fault models V Dhare, U Mehta IETE Journal of Research 68 (3), 1812-1822, 2022 | 3 | 2022 |
Test Pattern Generator for Majority Voter based QCA Combinational Circuits targeting MMC Defect V Dhare, U Mehta 2019 IEEE European Test Symposium (ETS), 1-2, 2019 | 3 | 2019 |
Advanced ATPG based on FAN, testability measures and fault reduction V Dhare, U Mehta International Journal of VLSI Design & Communication Systems 5 (2), 11, 2014 | 3 | 2014 |
Implementation of compaction algorithm for ATPG generated partially specified test data V Dhare, U Mehta International Journal of VLSI design & Communication Systems (VLSICS) 4 (1), 2013 | 3 | 2013 |
Object Oriented Implementation of Combinational Controllability and Observability Algorithms VH Dhare, U Mehta International Journal on Electronics Engineering: Kurukshetra, Hariyana …, 2010 | 3 | 2010 |
Implementation and defect analysis of QCA based reversible combinational circuit V Dhare, D Agarwal Technologies for Sustainable Development, 244-249, 2020 | 2 | 2020 |
Defect Analysis of Quantum-Dot Cellular Automata Combinational Circuit Using HLDQ V Dhare, U Mehta International Journal of Advanced Research in Engineering and Technology 7 …, 2016 | 2 | 2016 |
SAF analyses of analog and mixed signal vlsi circuit: Digital to analog converter V Dhare, U Mehta International Journal of VLSI Design & Communication Systems (VLSICS) 6 (3), 2015 | 2 | 2015 |
Analytical method for cell displacement defect quantum-dot cellular automata primitive V Dhare, U Mehta Journal of Electronic Science and Technology 21 (1), 100183, 2023 | 1 | 2023 |
Test generation algorithm for quantum-dot cellular automata (QCA) technology V Dhare, U Mehta | 1 | 2023 |
1-bit Magnitude Comparator based on ReversibleLogic using QCA Technology V Dhare, D Modi 2023 IEEE Devices for Integrated Circuit (DevIC), 9-12, 2023 | | 2023 |