Dr.-Ing. Éricles Sousa
Dr.-Ing. Éricles Sousa
Infineon Technologies, Germany
Verified email at bsd.com.br - Homepage
Title
Cited by
Cited by
Year
Power density-aware resource management for heterogeneous tiled multicores
H Khdr, S Pagani, E Sousa, V Lari, A Pathania, F Hannig, M Shafique, ...
IEEE Transactions on Computers 66 (3), 488-501, 2016
462016
Accuracy and Performance Analysis of Harris Corner Computation on Tightly-Coupled Processor Arrays
E Sousa, A Tanase, F Hannig, J Teich
Proceedings of the Conference on Design & Architectures for Signal and Image …, 2013
142013
Resource-awareness on heterogeneous MPSoCs for image processing
J Paul, W Stechele, B Oechslein, C Erhardt, J Schedel, D Lohmann, ...
Journal of Systems Architecture 61 (10), 668-680, 2015
122015
Runtime Reconfigurable Bus Arbitration for Concurrent Applications on Heterogeneous MPSoC Architectures
É Sousa, D Gangadharan, F Hannig, J Teich
17th Euromicro Conference on Digital System Design (DSD), 74-81, 2014
102014
ARMAR-III: Advances in humanoid grasping and manipulation
T Asfour, N Vahrenkamp, D Schiebener, M Do, M Przybylski, K Welke, ...
Journal of the Robotics Society of Japan 31 (4), 341-346, 2013
92013
Runtime Adaptation of Application Execution under Thermal and Power Constraints in Massively Parallel Processor Arrays
É Sousa, F Hannig, J Teich, Q Chen, U Schlichtmann
Proceedings of the 18th International Workshop on Software and Compilers for …, 2015
52015
Acceleration of Optical Flow Computations on Tightly-Coupled Processor Arrays.
ER Sousa, A Tanase, V Lari, F Hannig, J Teich, J Paul, W Stechele, ...
25th Workshop on Parallel Systems and Algorithms (PARS), Germany., 2013
52013
Dark silicon management: an integrated and coordinated cross-layer approach
S Pagani, L Bauer, Q Chen, E Glocker, F Hannig, A Herkersdorf, H Khdr, ...
it-Information Technology 58 (6), 297-307, 2016
42016
Application-driven Reconfiguration of Shared Resources for Timing Predictability of MPSoC Platforms
D Gangadharan, E Sousa, V Lari, F Hannig, J Teich
In Proceedings of Asilomar Conference on Signals, Systems, and Computers …, 2014
42014
A reconfigurable memory architecture for system integration of coarse-grained reconfigurable arrays
É Sousa, A Tanase, F Hannig, J Teich
2017 International Conference on ReConFigurable Computing and FPGAs …, 2017
32017
Self-Adaptive Harris Corner Detection on Heterogeneous Many-core Processor
J Paul, W Stechele, E Sousa, V Lari, F Hannig, J Teich, M Kröhnert, ...
In Proceedings of the Conference on Design and Architectures for Signal and …, 2014
32014
A Prototype of an Adaptive Computer Vision Algorithm on an MPSoC Architecture
ER Sousa, A Tanase, F Hannig, J and Teich
Conference on Design & Architectures for Signal and Image Processing (DASIP …, 2013
32013
LoopInvader: A Compiler for Tightly Coupled Processor Arrays
A Tanase, M Witterauf, E Sousa, V Lari, F Hannig, J Teich
Tool Presentation at the University Booth at Design, Automation and Test in …, 2016
22016
Reconfigurable buffer structures for coarse-grained reconfigurable arrays
É Sousa, F Hannig, J Teich
International Embedded Systems Symposium, 218-229, 2015
22015
*‐Predictable MPSoC execution of real‐time control applications using invasive computing
M Brand, M Witterauf, É Sousa, A Tanase, F Hannig, J Teich
Concurrency and Computation: Practice and Experience, e5149, 2019
12019
Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case Study
É Sousa, M Witterauf, M Brand, A Tanase, F Hannig, J Teich
2018 IEEE 29th International Conference on Application-specific Systems …, 2018
12018
Resource-aware Computer Vision Application on Heterogeneous Multi-tile Architecture
E Sousa, J Paul, V Lari, F Hannig, J Teich, W Stechele
University Booth at DATE (Design Automation and Test in Europe), 2014
12014
An Analytical Model Proposed for Evaluating Efficiency of Partitioning Code in Hybrid Architectures Based on DSP and FPGA
ER Sousa, L Meloni
2011 IEEE International Conference on High Performance Computing and …, 2011
12011
Memory and Interface Architectures for Invasive Tightly Coupled Processor Arrays
ÉR Sousa
Friedrich-Alexander-Universität Erlangen-Nürnberg, 2018
2018
Technical Demonstrations Session
E Sousa, A Chakraborty, A Tanase, F Hannig, J Teich
2017 International Conference on ReConFigurable Computing and FPGAs …, 2017
2017
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