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Dr. Gopi Krishna Saramekala
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An analytical threshold voltage model for triple-material cylindrical gate-all-around (TM-CGAA) MOSFETs
S Dubey, A Santra, G Saramekala, M Kumar, PK Tiwari
IEEE Transactions on Nanotechnology 12 (5), 766-774, 2013
472013
An analytical threshold voltage model for a short-channel dual-metal-gate (DMG) recessed-source/drain (Re-S/D) SOI MOSFET
GK Saramekala, A Santra, S Dubey, S Jit, PK Tiwari
Superlattices and Microstructures 60, 580-595, 2013
232013
Analytical subthreshold current and subthreshold swing models of short-channel dual-metal-gate (DMG) fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs
GK Saramekala, A Santra, M Kumar, S Dubey, S Jit, PK Tiwari
Journal of Computational Electronics 13 (2), 467-476, 2014
142014
Analytical model for subthreshold current and subthreshold swing of short-channel double-material-gate MOSFETs with strained-silicon channel on silicon—germanium substrates
PK Tiwari, GK Saramekala, S Dubey, AK Mukhopadhyay
Journal of Semiconductors 35 (10), 104002, 2014
112014
An analytical surface potential modeling of fully-depleted symmetrical double-gate (DG) strained-Si MOSFETs including the effect of interface charges
S Sarangi, A Santra, S Bhushan, KS Gopi, S Dubey, PK Tiwari
2013 Students Conference on Engineering and Systems (SCES), 1-5, 2013
92013
Analog and RF performance evaluation of negative capacitance SOI junctionless transistor
S Moparthi, KP Adarsh, PK Tiwari, GK Saramekala
AEU-International Journal of Electronics and Communications 122, 153243, 2020
82020
Analog and radio-frequency performance analysis of silicon-nanotube MOSFETs
PK Tiwari, M Kumar, RS Naik, GK Saramekala
Journal of Semiconductors 37 (6), 064003, 2016
72016
Analog and radio-frequency (RF) performance evaluation of fully-depleted (FD) recessed-source/drain (Re-S/D) SOI MOSFETs
GK Saramekala, S Dubey, PK Tiwari
Superlattices and Microstructures 76, 77-89, 2014
72014
A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric
GK Saramekala, S Dubey, PK Tiwari
Chinese Physics B 24 (10), 108505, 2015
52015
Investigation of temperature and source/drain overlap impact on negative capacitance silicon nanotube FET (NC Si NTFET) with sub-60mV/decade switching
S Moparthi, PK Tiwari, VR Samoju, GK Saramekala
IEEE Transactions on Nanotechnology 19, 800-806, 2020
42020
An analytical threshold voltage model of fully depleted (FD) recessed-source/drain (re-S/D) SOI MOSFETs with Back-gate control
GK Saramekala, PK Tiwari
Journal of Electronic Materials 45 (10), 5367-5374, 2016
32016
A simulation-based study of gate misalignment effects in triple-material double-gate (tmdg) mosfets
S Sarangi, S Bhushan, SG Krishna, A Santra, PK Tiwari
2013 International Mutli-Conference on Automation, Computing, Communication …, 2013
32013
Investigation of the Electrical Properties of Double-Gate Dual-Active-Layer (DG-DAL) Thin-Film Transistor (TFT) with HfO2| La2O3| HfO2 (HLH) Sandwich Gate Dielectrics
L Ramesh, S Moparthi, PK Tiwari, VR Samoju, GK Saramekala
Semiconductors 54 (10), 1290-1295, 2020
22020
Automated Seed Sowing Agribot
YN Kumar, C Haswanth, MH Kiran, MK Rao, R Raj, GK Saramekala, ...
2019 IEEE 1st International Conference on Energy, Systems and Information …, 2019
22019
A Two-Dimensional Subthreshold Current Model of Recessed-Source/Drain (Re-S/D) SOI MOSFETs with High-k Dielectric
GK Saramekala, PK Tiwari
2014 8th Asia Modelling Symposium, 258-263, 2014
22014
Temperature dependence of subthreshold characteristics of negative capacitance recessed-source/drain (NC RS/D) SOI MOSFET
S Moparthi, PK Tiwari, VR Samoju, GK Saramekala
2019 IEEE International Symposium on Smart Electronic Systems (iSES …, 2019
12019
Modeling and simulation of subthreshold characteristics of short-channel fully-depleted recessed-source/Drain SOI MOSFETs
GK Saramekala
12017
ATLAS™ based simulation study of the electrical characteristics of dual-metal-gate (DMG) fully-depleted (FD) recessed-source/drain (Re-S/D) SOI MOSFETs
GK Saramekala, S Jit, PK Tiwari
2014 International Conference on Advances in Electrical Engineering (ICAEE), 1-4, 2014
12014
Sensitivity Analysis of Silicon Nanotube FET (Si NTFET) with TCAD Assisted Machine Learning
S Moparthi, PK Tiwari, GK Saramekala
Silicon, 1-11, 2022
2022
Analog/RF Performance of Triple Material Gate Stack-Graded Channel Double Gate-Junctionless Strained-silicon MOSFET with Fixed Charges
SS Rao, RDB Joseph, VD Chintala, GK Saramekala, D Srikar, NB Rao
Silicon, 1-14, 2021
2021
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