| An integrated feature frame work for automated segmentation of COVID‐19 infection from lung CT images D Selvaraj, A Venkatesan, VGV Mahesh, AN Joseph Raj International Journal of Imaging Systems and Technology 31 (1), 28-46, 2021 | 31 | 2021 |
| Efficient VLSI implementation of FFT for orthogonal frequency division multiplexing applications V Arunachalam, A Noel Joseph Raj IET Circuits, Devices & Systems 8 (6), 526-531, 2014 | 29 | 2014 |
| Efficient dual-precision floating-point fused-multiply-add architecture V Arunachalam, ANJ Raj, N Hampannavar, CB Bidul Microprocessors and Microsystems 57, 23-31, 2018 | 15 | 2018 |
| Architectural Analysis of RSA cryptosystem on FPGA V Garg, V Arunachalam International Journal of Computer Applications 26 (8), 30-34, 2011 | 9 | 2011 |
| Analysis & design of convolution operator for high speed and high accuracy convolutional neural network-based inference engines S Deepika, V Arunachalam IEEE Transactions on Computers 71 (2), 390-396, 2021 | 4 | 2021 |
| Microelectronic Devices, Circuits and Systems: Second International Conference, ICMDCS 2021, Vellore, India, February 11-13, 2021, Revised Selected Papers V Arunachalam, K Sivasankaran Springer Nature, 2021 | 2 | 2021 |
| Automatic Detection of Tuberculosis from Chest X-Rays using Convolutional Neural Network KG Satheeshkumar, V Arunachalam 2020 International Journal of Engineering and Advanced Technology (IJEAT) 9 …, 2020 | 2 | 2020 |
| FPGA implementation & comparison of current trends in memory scheduler for multimedia application AM Kulkarni, V Arunachalam Proceedings of the International Conference & Workshop on Emerging Trends in …, 2011 | 2 | 2011 |
| Hardware/Software partitioning algorithm for embedded systems with repeated functionalities V Arunachalam, S Sapra, NSK Chaitanya, JP Rainac TENCON 2008-2008 IEEE Region 10 Conference, 1-6, 2008 | 2 | 2008 |
| Performance improvement of vector-radix decimation-in-frequency 3D-DCT/IDCT using variable word length V Arunachalam, AN Joseph Raj, S Deepika Circuits, Systems, and Signal Processing 40, 1818-1831, 2021 | 1 | 2021 |
| Power domain, physical aware scan chain allocation and reordering V Divakar, D., Arunachalam Indian Journal of Science and Technology, 2016 | 1 | 2016 |
| Hand-held GPU Accelerated Device for Multiclass Classification of X-ray Images Using CNN Model KG Satheeshkumar, V Arunachalam, S Deepika Microprocessors and Microsystems, 105046, 2024 | | 2024 |
| Design of high performance and energy efficient convolution array for convolution neural network-based image inference engine S Deepika, V Arunachalam Engineering Applications of Artificial Intelligence 126, 106953, 2023 | | 2023 |
| Depthwise convolution based pyramid ResNet model for accurate detection of COVID-19 from chest X-Ray images KG Satheesh Kumar, V Arunachalam The Imaging Science Journal, 1-17, 2023 | | 2023 |
| Microelectronic Devices, Circuits and Systems: Third International Conference, ICMDCS 2022, Vellore, India, August 11–13, 2022, Revised Selected Papers V Arunachalam, K Sivasankaran Springer Nature, 2022 | | 2022 |
| Fusion of near-infrared and RGB images on a FPGA using high level synthesis tool ANJ Raj, M Murugappan, V Arunachalam Journal of Engineering Research 9 (3A), 2021 | | 2021 |
| Memory Efficient ASIC Implementation of Line Hough Transform KV Pachkor, V Arunachalam 2018 3rd IEEE International Conference on Recent Trends in Electronics …, 2018 | | 2018 |
| DESIGN OF 8× 8 2D-DCT PROCESSOR FOR HIGH ACCURACY HIGH PERFORMANCE APPLICATIONS V Arunachalam, ANJ Raj Far East Journal of Electronics and Communications 15 (2), 151, 2015 | | 2015 |
| Vibhor Garg V Arunachalam | | 2011 |
| FPGA Implementation of Dynamic Energy Efficient Memory Controller for a H. 264/AVC Application AM Kulkarni, V Arunachalam | | |
Alex Noel Joseph RajQueens University BelfastVerified email at qub.ac.uk
