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Dr. Alok Naugarhiya
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Year
RF & linearity distortion sensitivity analysis of DMG-DG-Ge pocket TFET with hetero dielectric
KN Priyadarshani, S Singh, A Naugarhiya
Microelectronics Journal 108, 104973, 2021
322021
Vertically Extended Drain Double Gate Si1−xGex Source Tunnel FET : Proposal & Investigation For Optimized Device Performance
A Raj, S Singh, KN Priyadarshani, R Arya, A Naugarhiya
Silicon 13, 2589-2604, 2021
192021
Dual metal double gate Ge-pocket TFET (DMG-DG-Ge-Pocket TFET) with hetero dielectric: DC & analog performance projections
KN Priyadarshani, S Singh, A Naugarhiya
Silicon, 1-12, 2021
172021
Application of workfunction engineering in vertical superjunction devices
P Nautiyal, A Naugarhiya, S Verma
Superlattices and Microstructures 109, 927-935, 2017
172017
High permittivity material selection for design of optimum Hk VDMOS
A Naugarhiya, PN Kondekar
Superlattices and Microstructures 83, 310-321, 2015
162015
VERILOG based simulation of ASK, FSK, PSK, QPSK digital modulation techniques
A Sharma, S Majumdar, A Naugarhiya, B Acharya, S Majumder, S Verma
2017 International Conference on I-SMAC (IoT in Social, Mobile, Analytics …, 2017
152017
Optimization of Si-doped Hf ferroelectric material-based negative capacitance junctionless TFET: Impact of temperature on RF/linearity performance
S Singh, S Singh, A Naugarhiya
International Journal of Modern Physics B 34 (27), 2050242, 2020
112020
Novel strained superjunction VDMOS
A Naugarhiya, S Dubey, PN Kondekar
Superlattices and Microstructures 85, 461-468, 2015
112015
Strained superjunction U-MOSFET with insulating layer between alternate pillars
P Nautiyal, A Naugarhiya, S Verma
Materials Research Express 6 (4), 046424, 2019
102019
Incorporation of hafnium and platinum metal in vertical power mosfets
O Parmar, A Naugarhiya
Journal of Computational Electronics 17, 1241-1248, 2018
102018
Analysis of total ionizing dose response of optimized fin geometry workfunction modulated SOI-FinFET
A Ray, A Naugarhiya, GP Mishra
Microelectronics Reliability 134, 114549, 2022
92022
An insulated gate bipolar transistor with three-layer poly gate for improved figure of merit
N Gupta, S Singh, A Naugarhiya
Journal of Materials Science: Materials in Electronics 31 (18), 15513-15521, 2020
92020
SEGR hardened superjunction VDMOS with high-K gate dielectrics
S Ranjan, S Majumder, A Naugarhiya
2020 International Conference on Power Electronics & IoT Applications in …, 2020
92020
RF based wireless data transmission between two FPGAs
J Rusia, A Naugarhiya, S Majumder, S Majumdar, B Acharya, S Verma
2016 international conference on ICT in business industry & government …, 2016
92016
1.4 kv planar gate superjunction igbt with stepped doping profile in drift and collector region
N Gupta, A Naugarhiya
Silicon 13, 697-706, 2021
82021
Trench IGBT with stepped doped collector for low energy loss
M Vaidya, A Naugarhiya, S Verma
Semiconductor Science and Technology 35 (2), 025015, 2020
82020
Remote temperature & humidity sensing through ASK modulation technique
J Rusia, A Naugarhiya, S Majumder, S Majumdar, B Acharya, S Verma
2016 International Conference on ICT in Business Industry & Government …, 2016
82016
Lateral variation-doped insulated gate bipolar transistor for low on-state voltage with low loss
M Vaidya, A Naugarhiya, S Verma, GP Mishra
IEEE Electron Device Letters 41 (6), 888-891, 2020
62020
Workfunction engineered stepped gate SJ UMOS with reduced specific resistance for high speed applications
P Nautiyal, A Naugarhiya, S Verma
Semiconductor Science and Technology 34 (9), 095016, 2019
62019
Analytical model for 4H-SiC superjunction drift layer with anisotropic properties for ultrahigh-voltage applications
A Naugarhiya, P Wakhradkar, PN Kondekar, GC Patil, RM Patrikar
Journal of Computational Electronics 16, 190-201, 2017
62017
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