Analytical modeling and simulation of multigate FinFET devices and the impact of high-k dielectrics on short channel effects (SCEs) V Narendar, RA Mishra Superlattices and Microstructures 85, 357-369, 2015 | 109 | 2015 |
Leakage power and delay analysis of LECTOR based CMOS circuits P Verma, RA Mishra 2011 2nd International Conference on Computer and Communication Technology …, 2011 | 42 | 2011 |
DFAL: diode-free adiabatic logic circuits S Upadhyay, RA Mishra, RK Nagaria, SP Singh International Scholarly Research Notices 2013, 2013 | 34 | 2013 |
Multi-gate MOSFET structures with high-k dielectric materials SL Tripathi, R Mishra, RA Mishra J. Electron Devices 16, 1388-1394, 2012 | 33 | 2012 |
Characteristic comparison of connected DG FINFET, TG FINFET and Independent Gate FINFET on 32 nm technology SL Tripathi, R Mishra, RA Mishra 2012 2nd International Conference on Power, Control and Embedded Systems, 1-7, 2012 | 30 | 2012 |
Design of high-performance digital logic circuits based on FinFET technology V Narendar, S Rai, RA Mishra International Journal of Computer Applications 41 (20), 2012 | 28 | 2012 |
Modelling, design, and performance comparison of triple gate cylindrical and partially cylindrical FinFETs for low-power applications S Rai, J Sahu, W Dattatray, RA Mishra, S Tiwari International Scholarly Research Notices 2012, 2012 | 22 | 2012 |
Design and analysis of nano-scaled SOI MOSFET-based ring oscillator circuit for high density ICs NA Srivastava, A Priya, RA Mishra Applied Physics A 125, 1-15, 2019 | 21 | 2019 |
A two dimensional analytical modeling of surface potential in triple metal gate (TMG) fully-depleted Recessed-Source/Drain (Re-S/D) SOI MOSFET A Priya, RA Mishra Superlattices and Microstructures 92, 316-329, 2016 | 20 | 2016 |
Low power dynamic buffer circuits AK Pandey, RA Mishra, RK Nagaria International Journal of VLSI Design & Communication Systems 3 (5), 53, 2012 | 19 | 2012 |
Analog and radio-frequency performance of nanoscale SOI MOSFET for RFIC based communication systems NA Srivastava, A Priya, RA Mishra Microelectronics Journal 98, 104731, 2020 | 18 | 2020 |
High performance Bulk FinFET with bottom spacer SL Tripathi, R Mishra, V Narendra, RA Mishra 2013 IEEE International Conference on Electronics, Computing and …, 2013 | 18 | 2013 |
A two-dimensional (2D) analytical subthreshold swing and transconductance model of underlap dual-material double-gate (DMDG) MOSFET for analog/RF applications V Narendar, S Rai, S Tiwari, RA Mishra Superlattices and Microstructures 100, 274-289, 2016 | 16 | 2016 |
Nutrient uptake of banana (Musa paradisiaca) var. Basrai dwarf. OS Jauhari, RA Mishra, CB Tewari | 14 | 1974 |
Low-power adiabatic computing with improved quasistatic energy recovery logic S Upadhyay, RK Nagaria, RA Mishra VLSI Design 2013, 15-15, 2013 | 13 | 2013 |
Significance of variation in various parameters on electrical characteristics of FinFET devices MK Rai, V Narendar, RA Mishra 2014 Students Conference on Engineering and Systems, 1-6, 2014 | 12 | 2014 |
Leakage current minimization in dynamic circuits using sleep switch A Mishra, RA Mishra 2012 Students Conference on Engineering and Systems, 1-6, 2012 | 12 | 2012 |
Benefits of dual tree complex wavelet transform over discrete wavelet transform for image fusion RR Singh, R Mishra International Journal for Innovative Research in Science and Technology 1 …, 2015 | 11 | 2015 |
Suppression of short channel effects (SCEs) by dual material gate vertical surrounding gate (DMGVSG) MOSFET: 3-D TCAD simulation DB Chandar, N Vadthiya, A Kumar, RA Mishra Procedia Engineering 64, 125-132, 2013 | 11 | 2013 |
Design of high speed and low-power ring oscillator circuit in recessed source/drain SOI technology A Priya, NA Srivastava, RA Mishra ECS Journal of Solid State Science and Technology 8 (3), N47, 2019 | 10 | 2019 |