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Dr. BRINDA BHOWMICK
Dr. BRINDA BHOWMICK
Professor, NIT Silchar
Verified email at ece.nits.ac.in - Homepage
Title
Cited by
Cited by
Year
Comparative analyses of circular gate TFET and heterojunction TFET for dielectric-modulated label-free biosensing
R Goswami, B Bhowmick
IEEE Sensors Journal 19 (21), 9600-9609, 2019
1242019
N+ pocket doped vertical TFET based dielectric-modulated biosensor considering non-ideal hybridization issue: A simulation study
VD Wangkheirakpam, B Bhowmick, PD Pukhrambam
IEEE Transactions on Nanotechnology 19, 156-162, 2020
962020
Temperature effect on RF/analog and linearity parameters in DMG FinFET
R Saha, B Bhowmick, S Baishya
Applied Physics A 124, 1-10, 2018
792018
Investigation of a Ge-source vertical TFET with delta-doped layer
K Vanlalawpuia, B Bhowmick
IEEE Transactions on Electron Devices 66 (10), 4439-4445, 2019
762019
Heterojunction fully depleted SOI-TFET with oxide/source overlap
S Chander, B Bhowmick, S Baishya
Superlattices and Microstructures 86, 43-50, 2015
542015
A hetero-dielectric stack gate SOI-TFET with back gate and its application as a digital inverter
SK Mitra, R Goswami, B Bhowmick
Superlattices and Microstructures 92, 37-51, 2016
522016
Electrical noise in circular gate tunnel FET in presence of interface traps
R Goswami, B Bhowmick, S Baishya
Superlattices and Microstructures 86, 342-354, 2015
502015
N+ pocket-doped vertical TFET for enhanced sensitivity in biosensing applications: modeling and simulation
WV Devi, B Bhowmick, PD Pukhrambam
IEEE Transactions on Electron Devices 67 (5), 2133-2139, 2020
462020
Effect of scaling on noise in circular gate TFET and its application as a digital inverter
R Goswami, B Bhowmick, S Baishya
Microelectronics Journal 53, 16-24, 2016
452016
Review of FinFET devices and perspective on circuit design challenges
RK Maurya, B Bhowmick
Silicon 14 (11), 5783-5791, 2022
392022
An analytical model of drain current in a nanoscale circular gate TFET
R Goswami, B Bhowmick
IEEE Transactions on Electron Devices 64 (1), 45-51, 2016
392016
Statistical dependence of gate metal work function on various electrical parameters for an n-channel Si step-FinFET
R Saha, B Bhowmick, S Baishya
IEEE Transactions on Electron Devices 64 (3), 969-976, 2017
362017
TFET on Selective Buried Oxide (SELBOX) Substrate with Improved ION/IOFF Ratio and Reduced Ambipolar Current
D Barah, AK Singh, B Bhowmick
Silicon 11 (2), 973-981, 2019
352019
Analysis of hetero-stacked source TFET and heterostructure vertical TFET as dielectrically modulated label-free biosensors
K Vanlalawmpuia, B Bhowmick
IEEE Sensors Journal 22 (1), 939-947, 2021
322021
Noise behavior of ferro electric tunnel FET
B Das, B Bhowmick
Microelectronics Journal 96, 104677, 2020
322020
3D analytical modeling of surface potential, threshold voltage, and subthreshold swing in dual-material-gate (DMG) SOI FinFETs
R Saha, S Baishya, B Bhowmick
Journal of Computational Electronics 17, 153-162, 2018
322018
Optimisation of pocket doped junctionless TFET and its application in digital inverter
WV Devi, B Bhowmick
Micro & Nano Letters 14 (1), 69-73, 2019
302019
Scaling of dopant segregation Schottky barrier using metal strip buried oxide MOSFET and its comparison with conventional device
P Kumar, WasimArif, B Bhowmick
Silicon 10, 811-820, 2018
302018
Analysis on effect of lateral straggle on analog, high frequency and DC parameters in Ge‐source DMDG TFET
R Saha, DK Panda, R Goswami, B Bhowmick, S Baishya
International Journal of RF and Microwave Computer‐Aided Engineering 31 (4 …, 2021
282021
Effect of curie temperature on ferroelectric tunnel FET and its RF/analog performance
B Das, B Bhowmick
IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control 68 …, 2020
272020
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