Rachata Ausavarungnirun
Rachata Ausavarungnirun
Verified email at tggs.kmutnb.ac.th - Homepage
TitleCited byYear
Staged memory scheduling: achieving high performance and scalability in heterogeneous systems
R Ausavarungnirun, KKW Chang, L Subramanian, GH Loh, O Mutlu
Proceedings of the 39th Annual International Symposium on Computer …, 2012
2362012
RowClone: fast and energy-efficient in-DRAM bulk data copy and initialization
V Seshadri, Y Kim, C Fallin, D Lee, R Ausavarungnirun, G Pekhimenko, ...
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
213*2013
Row buffer locality aware caching policies for hybrid memories
HB Yoon, J Meza, R Ausavarungnirun, RA Harding, O Mutlu
2012 IEEE 30th International Conference on Computer Design (ICCD), 337-344, 2012
169*2012
Managing GPU concurrency in heterogeneous architectures
O Kayiran, NC Nachiappan, A Jog, R Ausavarungnirun, MT Kandemir, ...
2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 114-126, 2014
1162014
MinBD: Minimally-buffered deflection routing for energy-efficient interconnect
C Fallin, G Nazario, X Yu, K Chang, R Ausavarungnirun, O Mutlu
2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip, 1-10, 2012
1132012
Application-to-core mapping policies to reduce memory system interference in multi-core systems
R Das, R Ausavarungnirun, O Mutlu, A Kumar, M Azimi
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
982013
Decoupled direct memory access: Isolating CPU and IO traffic by leveraging a dual-data-port DRAM
D Lee, L Subramanian, R Ausavarungnirun, J Choi, O Mutlu
Proceedings of the 24th International Conference on Parallel Architecture …, 2015
802015
A case for core-assisted bottleneck acceleration in GPUs: enabling flexible data compression with assist warps
N Vijaykumar, G Pekhimenko, A Jog, A Bhowmick, R Ausavarungnirun, ...
ACM SIGARCH Computer Architecture News 43 (3), 41-53, 2016
792016
HAT: Heterogeneous adaptive throttling for on-chip networks
KKW Chang, R Ausavarungnirun, C Fallin, O Mutlu
2012 IEEE 24th International Symposium on Computer Architecture and High …, 2012
732012
Design-induced latency variation in modern DRAM chips: Characterization, analysis, and latency reduction mechanisms
D Lee, S Khan, L Subramanian, S Ghose, R Ausavarungnirun, ...
Proceedings of the ACM on Measurement and Analysis of Computing Systems 1 (1 …, 2017
71*2017
Exploiting Inter-Warp Heterogeneity to Improve GPGPU Performance
R Ausavarungnirun, S Ghose, O Kayıran, GH Loh, CR Das, MT Kandemir, ...
Proceedings of the 24th International Conference on Parallel Architectures …, 2015
642015
Google workloads for consumer devices: Mitigating data movement bottlenecks
A Boroumand, S Ghose, Y Kim, R Ausavarungnirun, E Shiu, R Thakur, ...
ACM SIGPLAN Notices 53 (2), 316-331, 2018
522018
Mosaic: a GPU memory manager with application-transparent support for multiple page sizes
R Ausavarungnirun, J Landgraf, V Miller, S Ghose, J Gandhi, ...
Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017
422017
Design and evaluation of hierarchical rings with deflection routing
R Ausavarungnirun, C Fallin, X Yu, KKW Chang, G Nazario, R Das, ...
2014 IEEE 26th International Symposium on Computer Architecture and High …, 2014
352014
Mask: Redesigning the gpu memory hierarchy to support multi-application concurrency
R Ausavarungnirun, V Miller, J Landgraf, S Ghose, J Gandhi, A Jog, ...
ACM SIGPLAN Notices 53 (2), 503-518, 2018
292018
μC-States: Fine-grained GPU datapath power management
O Kayiran, A Jog, A Pattnaik, R Ausavarungnirun, X Tang, MT Kandemir, ...
2016 International Conference on Parallel Architecture and Compilation …, 2016
282016
A low-overhead, fully-distributed, guaranteed-delivery routing algorithm for faulty network-on-chips
M Fattah, A Airola, R Ausavarungnirun, N Mirzaei, P Liljeberg, J Plosila, ...
Proceedings of the 9th International Symposium on Networks-on-Chip, 18, 2015
242015
Application-to-core mapping policies to reduce memory interference in multi-core systems
R Das, R Ausavarungnirun, O Mutlu, A Kumar, M Azimi
2012 21st International Conference on Parallel Architectures and Compilation …, 2012
242012
LTRF: Enabling high-capacity register files for GPUs via hardware/software cooperative register prefetching
M Sadrosadati, A Mirhosseini, SB Ehsani, H Sarbazi-Azad, M Drumond, ...
ACM SIGPLAN Notices 53 (2), 489-502, 2018
192018
Enabling the adoption of processing-in-memory: Challenges, mechanisms, future research directions
S Ghose, K Hsieh, A Boroumand, R Ausavarungnirun, O Mutlu
arXiv preprint arXiv:1802.00320, 2018
192018
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Articles 1–20