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Dr. Rajendra Prasad Somineni
Dr. Rajendra Prasad Somineni
Professor of Electronics and Communication, VNR VJIET
Verified email at vnrvjiet.in
Title
Cited by
Cited by
Year
Characterization for sub-5nm technology nodes of junctionless gate-all-around nanowire FETs
AS Kumar, M Deekshana, VB Sreenivasulu, RP Somineni, DK Sudha
2022 13th International Conference on Computing Communication and Networking …, 2022
282022
Implementation of wireless sensor network for real time overhead tank water quality monitoring
C Sowmya, CD Naidu, RP Somineni, DR Reddy
2017 IEEE 7th International Advance Computing Conference (IACC), 546-551, 2017
262017
Design and performance analysis of 32× 32 memory array SRAM for low-power applications
X Xue, A Sai Kumar, OI Khalaf, RP Somineni, GM Abdulsahib, A Sujith, ...
Electronics 12 (4), 834, 2023
242023
Design of 32nm Forced Stack CNTFET SRAM Cell for Leakage Power Reduction
BKMKLK Rajendra Prasad S
International Conference on Computing, Electronics and Electrical …, 2012
192012
A symmetric novel 8T3R non-volatile SRAM cell for embedded applications
UM Janniekode, RP Somineni, OI Khalaf, MM Itani, J Chinna Babu, ...
Symmetry 14 (4), 768, 2022
182022
Design of Low Write-Power Consumption SRAM Cell based on CNTFET at 32nm Technology
BKMKLK Rajendra Prasad S
International Journal of VLSI Design & Communication Systems (VLSICS) 2 (4 …, 2011
13*2011
Low leakage CNTFET full adders
RP Somineni, YP Sai, SN Leela
2015 Global Conference on Communication Technologies (GCCT), 174-179, 2015
122015
Low Leakage-Power SRAM cell design using CNTFETs at 32nm Technology
BKMKLK Rajendra Prasad S
International Conference on Communication, Network, and Computing (CNC-2012 …, 2012
11*2012
Design of a 32nm 7T SRAM Cell based on CNTFET for Low Power Operation
BKMKLK Rajendra Prasad S
International Conference on Devices Circuits and Systems (ICDCS-2012) 1 (1 …, 2012
102012
Reduction of Leakage-Power in CNTFET SRAM Cell using Stacked Sleep Technique at 32nm Technology
BKMKLK Rajendra Prasad S
International Conference on Advances in Engineering, Science and Management …, 2012
9*2012
Design of low-leakage CNTFET SRAM cell at 32nm technology using forced stack technique
SR Prasad, BK Madhavi, KL Kishore
International Journal of Engineering Research and Applications 2 (1), 805-808, 2012
92012
Design and analysis of 16nm gnrfet and cmos based low power 4kb sram array using 1-bit 6t sram cell
BV Garidepalli, RP Somineni, A Peddi, UM Janniekode
2022 IEEE IAS Global Conference on Emerging Technologies (GlobConET), 102-108, 2022
62022
Design of low power multiplier using CNTFET
RP Somineni, SM Jaweed
2017 IEEE 7th International Advance Computing Conference (IACC), 556-559, 2017
62017
Design and analysis of different full adder cells using new technologies
ND Kumar, RP Somineni, CHR Kumari
Int J Reconfigurable & Embedded Syst ISSN 2089 (4864), 4864, 2020
5*2020
Riverbed modeler simulation-based performance analysis of routing protocols in mobile ad hoc networks
YC Rao, P Kishore, SR Prasad
Int. J. Recent Technol. Eng.(IJRTE) 7, 350-354, 2019
52019
Design and performance analysis of 6T SRAM cell in different technologies and nodes
UM Janniekode, RP Somineni, CD Naidu
International Journal of Performability Engineering 17 (2), 167, 2021
42021
Low leakage CNTFET SRAM cells
RP Somineni, BK Madhavi, KL Kishore
Procedia Computer Science 57, 1049-1056, 2015
42015
Data-Retention Sleep Transistor CNTFET SRAM Cell Design at 32nm Technology for Low-Leakage
BKMKLK Rajendra Prasad S
2nd International Conference on Advances in Information Technology and …, 2012
42012
A New Low Power 9T SRAM Cell based on CNTFET at 32nm Technology Node
BKMKLK Rajendra Prasad S
International Journal of Computer Science and Information Technologies 2 (6 …, 2011
4*2011
Performance analysis of RRAM based low power NVSRAM cell designs for IoT applications
UM Janniekode, RP Somineni
2022 2nd International Conference on Emerging Frontiers in Electrical and …, 2022
32022
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