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Sanjay Mahawar
Sanjay Mahawar
ABES Engineering College, Ghaziabad
Verified email at iitr.ac.in
Title
Cited by
Cited by
Year
Performance Enhancement of STT MRAM Using Asymmetric-Sidewall-Spacer NMOS
S Verma, PK Pal, S Mahawar, BK Kaushik
IEEE Transactions on Electron Devices 63 (7), 2771-2776, 2016
62016
Low power STT MRAM cell with asymmetric drive current vertical GAA select device
S Verma, S Mahawar, BK Kaushik
2015 12th International Conference on Electrical Engineering/Electronics …, 2015
32015
Highly reliable STT MRAM using fully depleted body and buried 4H-SiC NMOS
S Mahawar, S Verma, PK Pal, BK Kaushik
2015 IEEE International Conference on Electron Devices and Solid-State …, 2015
12015
Energy Enhancement in Wireless SensorNetworks through Distributed Fibre Sensor
D Choudhary, S Mahawar
RJSITM ISSN:2251 1563 5 (7), 8, 2016
2016
Design and modelling of STT MRAM
S Mahawar
IITR, Roorkee, 2015
2015
Impact of Doping concentration and gate voltages on Simulation of n-FinFET
A Bhaskar, S Mahawar, D Choudhary
Journal of VLSI Design and Signal Processing 3 (2), 0
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