Rajit Karmakar
Rajit Karmakar
Verified email at ece.iitkgp.ernet.in
Title
Cited by
Cited by
Year
Encrypt flip-flop: A novel logic encryption technique for sequential circuits
R Karmakar, S Chatopadhyay, R Kapur
arXiv preprint arXiv:1801.04961, 2018
542018
A new logic encryption strategy ensuring key interdependency
R Karmakar, N Prasad, S Chattopadhyay, R Kapur, I Sengupta
2017 30th International Conference on VLSI Design and 2017 16th …, 2017
252017
A scan obfuscation guided design-for-security approach for sequential circuits
R Karmakar, S Chattopadhyay, R Kapur
IEEE Transactions on Circuits and Systems II: Express Briefs 67 (3), 546-550, 2019
172019
On finding suitable key-gate locations in logic encryption
R Karmakar, H Kumar, S Chattopadhyay
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
162018
Theoretical computation of transmission coefficient of double quantum well triple barrier structure in presence of electric field
S Mukherjee, R Karmakar, A Deyasi
International Journal of Soft Computing and Engineering 1, 41-44, 2011
132011
Window-based peak power model and Particle Swarm Optimization guided 3-dimensional bin packing for SoC test scheduling
R Karmakar, S Chattopadhyay
Integration 50, 61-73, 2015
122015
Enhancing security of logic encryption using embedded key generation unit
R Karmakar, S Chattopadhyay, R Kapur
2017 International Test Conference in Asia (ITC-Asia), 131-136, 2017
112017
Optimization of the IEEE 1687 access network for hybrid access schedules
SS Nuthakki, R Karmakar, S Chattopadhyay, K Chakrabarty
2016 IEEE 34th VLSI Test Symposium (VTS), 1-6, 2016
112016
Efficient key-gate placement and dynamic scan obfuscation towards robust logic encryption
R Karmakar, H Kumar, S Chattopadhyay
IEEE Transactions on Emerging Topics in Computing, 2019
102019
Runtime mitigation of illegal packet request attacks in Networks-on-Chip
N Prasad, R Karmakar, S Chattopadhyay, I Chakrabarti
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
92017
Thermal-aware test data compression using dictionary based coding
R Karmakar, S Chattopadhyay
2015 28th International Conference on VLSI Design, 53-58, 2015
92015
Testing of 3d-stacked ics with hard-and soft-dies-a particle swarm optimization based approach
R Karmakar, A Agarwal, S Chattopadhyay
2015 IEEE 33rd VLSI Test Symposium (VTS), 1-6, 2015
72015
Calculating transmission coefficient of double quantum well triple barrier structure having parabolic geometry using propagation matrix method
R Karmakar, A Biswas, S Mukherjee, A Deyasi
IJEAT 1, 37-41, 2011
52011
On securing scan obfuscation strategies against ScanSAT attack
R Karmakar, S Chattopadhyay
2020 21st International Symposium on Quality Electronic Design (ISQED), 213-218, 2020
42020
Improving security of logic encryption in presence of design-for-testability infrastructure
R Karmakar, S Chattopadhyay, M Chakraborty
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019
42019
Thermal-Safe Schedule Generation For System-on-Chip Testing
R Karmakar, S Chattopadhyay
VLSI Design (VLSID), 2016 29th International Conference on, 2016
42016
A particle swarm optimization guided approximate key search attack on logic locking in the absence of scan access
R Karmakar, S Chattopadhyay
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 448-453, 2020
32020
A cellular automata guided obfuscation strategy for finite-state-machine synthesis
R Karmakar, SS Jana, S Chattopadhyay
2019 56th ACM/IEEE Design Automation Conference (DAC), 1-6, 2019
32019
A cellular automata guided two level obfuscation of Finite-State-Machine for IP protection
R Karmakar, SS Jana, S Chattopadhyay
Integration 74, 93-106, 2020
22020
Temperature and data size trade-off in dictionary based test data compression
R Karmakar, S Chattopadhyay
Integration 57, 20-33, 2017
22017
The system can't perform the operation now. Try again later.
Articles 1–20