Shubham Tayal
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Nanosheet field effect transistors-A next generation device to keep Moore's law alive: An intensive study
J Ajayan, D Nirmal, S Tayal, S Bhattacharya, L Arivazhagan, ASA Fletcher, ...
Microelectronics Journal 114, 105141, 2021
Analog/RF performance analysis of channel engineered high-k gate-stack based junctionless trigate-FinFET
S Tayal, A Nandi
Superlattices and Microstructures 112, 287-295, 2017
A review on emerging negative capacitance field effect transistor for low power electronics
SB Rahi, S Tayal, AK Upadhyay
Microelectronics Journal 116, 105242, 2021
Challenges in material processing and reliability issues in AlGaN/GaN HEMTs on silicon wafers for future RF power electronics & switching applications: A critical review
J Ajayan, D Nirmal, P Mohankumar, B Mounika, S Bhattacharya, S Tayal, ...
Materials Science in Semiconductor Processing 151, 106982, 2022
Optimization of gate-stack in junctionless Si-nanotube FET for analog/RF applications
S Tayal, A Nandi
Materials Science in Semiconductor Processing 80, 63-67, 2018
Analog/RF performance analysis of inner gate engineered junctionless Si nanotube
S Tayal, A Nandi
Superlattices and Microstructures 111, 862-871, 2017
Effect of FIBL in-conjunction with channel parameters on analog and RF FOM of FinFET
S Tayal, A Nandi
Superlattices and Microstructures 105, 152-162, 2017
Recent progress on negative capacitance tunnel FET for low-power applications: Device perspective
AK Upadhyay, SB Rahi, S Tayal, YS Song
Microelectronics Journal 129, 105583, 2022
Study of 6T SRAM cell using high-k gate dielectric based junctionless silicon nanotube FET
S Tayal, A Nandi
Superlattices and Microstructures 112, 143-150, 2017
A critical review of AlGaN/GaN-heterostructure based Schottky diode/HEMT hydrogen (H2) sensors for aerospace and industrial applications
J Ajayan, D Nirmal, R Ramesh, S Bhattacharya, S Tayal, LMIL Joseph, ...
Measurement 186, 110100, 2021
A comprehensive investigation of vertically stacked silicon nanosheet field effect transistors: an analog/rf perspective
S Tayal, J Ajayan, LMIL Joseph, J Tarunkumar, D Nirmal, B Jena, A Nandi
Silicon 14 (7), 3543-3550, 2022
Study of temperature effect on junctionless Si nanotube FET concerning analog/RF performance
S Tayal, A Nandi
Cryogenics 92, 71-75, 2018
Investigation of nanosheet-FET based logic gates at sub-7 nm technology node for digital IC applications
S Tayal, S Valasa, S Bhattacharya, J Ajayan, SM Ahmed, B Jena, ...
Silicon 14 (18), 12261-12267, 2022
Optimization of design space for vertically stacked junctionless nanosheet FET for analog/RF applications
S Valasa, S Tayal, LR Thoutam
Silicon 14 (16), 10347-10356, 2022
Incorporating bottom-up approach into device/circuit co-design for SRAM-based cache memory applications
S Tayal, B Smaani, SB Rahi, AK Upadhyay, S Bhattacharya, J Ajayan, ...
IEEE Transactions on Electron Devices 69 (11), 6127-6132, 2022
Performance analysis of junctionless DG‐MOSFET‐based 6T‐SRAM with gate‐stack configuration
S Tayal, A Nandi
Micro & Nano Letters 13 (6), 838-841, 2018
Temperature sensitivity analysis of inner-gate engineered JL-SiNT-FET: An Analog/RF prospective
S Tayal, V Mittal, S Jadav, S Gupta, A Nandi, B Krishan
Cryogenics 108, 103087, 2020
Enhancing the delay performance of junctionless silicon nanotube based 6T SRAM
S Tayal, A Nandi
Micro & Nano Letters 13 (7), 965-968, 2018
A critical review on performance, reliability, and fabrication challenges in nanosheet FET for future analog/digital IC applications
S Valasa, S Tayal, LR Thoutam, J Ajayan, S Bhattacharya
Micro and Nanostructures 170, 207374, 2022
Design insights into thermal performance of vertically stacked JL-NSFET with high-k gate dielectric for sub 5-nm technology node
S Valasa, S Tayal, LR Thoutam
ECS Journal of Solid State Science and Technology 11 (4), 041008, 2022
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