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Navjeet Bagga
Navjeet Bagga
Assistant Professor@ IIT Bhubaneswar
Verified email at iitbbs.ac.in
Title
Cited by
Cited by
Year
An analytical model for tunnel barrier modulation in triple metal double gate TFET
N Bagga, SK Sarkar
IEEE transactions on electron devices 62 (7), 2136-2142, 2015
1092015
Surface potential and drain current analytical model of gate all around triple metal TFET
N Bagga, S Dasgupta
IEEE Transactions on Electron Devices 64 (2), 606-613, 2017
822017
Demonstration of a novel two source region tunnel FET
N Bagga, A Kumar, S Dasgupta
IEEE Transactions on Electron Devices 64 (12), 5256-5262, 2017
692017
Compact 2D modeling and drain current performance analysis of a work function engineered double gate tunnel field effect transistor
S Sarkhel, N Bagga, SK Sarkar
Journal of Computational Electronics 15, 104-114, 2016
372016
Design optimization of three-stacked nanosheet FET from self-heating effects perspective
S Rathore, RK Jaisawal, PN Kondekar, N Bagga
IEEE Transactions on Device and Materials Reliability 22 (3), 396-402, 2022
352022
Assessing the analog/RF and linearity performances of FinFET using high threshold voltage techniques
RK Jaisawal, S Rathore, PN Kondekar, S Yadav, B Awadhiya, ...
Semiconductor Science and Technology 37 (5), 055010, 2022
252022
Dielectric modulated GaAs1− x Sb X FinFET as a label-free biosensor: Device proposal and investigation
A Dixit, DP Samajdar, N Bagga
Semiconductor Science and Technology 36 (9), 095033, 2021
232021
A novel twofold tunnel FET with reduced miller capacitance: proposal and investigation
N Bagga, N Chauhan, D Gupta, S Dasgupta
IEEE Transactions on Electron Devices 66 (7), 3202-3208, 2019
202019
A novel negative capacitance FinFET with ferroelectric spacer: proposal and investigation
V Chauhan, DP Samajdar, N Bagga, A Dixit
IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control 68 …, 2021
192021
Role of temperature on linearity and analog/RF performance merits of a negative capacitance FinFET
RK Jaisawal, S Rathore, N Gandhi, PN Kondekar, N Bagga
Semiconductor Science and Technology 37 (11), 115003, 2022
162022
Demonstration of a nanosheet FET with high thermal conductivity material as buried oxide: Mitigation of self-heating effect
S Rathore, RK Jaisawal, PN Kondekar, N Bagga
IEEE Transactions on Electron Devices 70 (4), 1970-1976, 2023
152023
Reliability of TCAD study for HfO2-doped Negative capacitance FinFET with different Material-Specific dopants
RK Jaisawal, S Rathore, PN Kondekar, N Bagga
Solid-State Electronics 199, 108531, 2023
152023
Negative-to-positive differential resistance transition in ferroelectric FET: physical insight and utilization in analog circuits
N Chauhan, N Bagga, S Banchhor, A Datta, S Dasgupta, A Bulusu
IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control 69 …, 2021
152021
Recent research trends in gate engineered tunnel FET for improved current behavior by subduing the ambipolar effects: A review
N Bagga, S Sarkhel, SK Sarkar
International Conference on Computing, Communication & Automation, 1264-1267, 2015
152015
Trap and self-heating effect based reliability analysis to reveal early aging effect in nanosheet FET
S Rathore, RK Jaisawal, PN Kondekar, N Bagga
Solid-State Electronics 200, 108546, 2023
142023
Performance investigation of a novel GaAs1-xSbx-on-insulator (GASOI) FinFET: Role of interface trap charges and hetero dielectric
A Dixit, DP Samajdar, N Bagga, DS Yadav
Materials Today Communications 26, 101964, 2021
142021
BOX engineering to mitigate negative differential resistance in MFIS negative capacitance FDSOI FET: an analog perspective
N Chauhan, N Bagga, S Banchhor, C Garg, A Sharma, A Datta, ...
Nanotechnology 33 (8), 085203, 2021
132021
Demonstration of a novel tunnel FET with channel sandwiched by drain
N Bagga, N Chauhan, S Banchhor, D Gupta, S Dasgupta
Semiconductor Science and Technology 35 (1), 015008, 2019
132019
Traps based reliability barrier on performance and revealing early ageing in negative capacitance FET
A Gupta, G Bajpai, P Singhal, N Bagga, O Prakash, S Banchhor, ...
2021 IEEE International Reliability Physics Symposium (IRPS), 1-6, 2021
122021
Performance evaluation of a novel GAA Schottky junction (GAASJ) TFET with heavily doped pocket
N Bagga, A Kumar, A Bhattacharjee, S Dasgupta
Superlattices and Microstructures 109, 545-552, 2017
122017
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