| Stacked ferroelectric non-planar capacitors in a memory bit-cell RK Dokania, N Sato, T Gosavi, P Pandey, D Olaosebikan, A Mathuriya, ... US Patent 11,423,967, 2022 | 25 | 2022 |
| 3D integrated ultra high-bandwidth memory RK Dokania, S Manipatruni, A Mathuriya, D Olaosebikan US Patent 11,043,472, 2021 | 18 | 2021 |
| Absorption bleaching by stimulated emission in erbium-doped silicon-rich silicon nitride waveguides D Olaosebikan, S Yerci, A Gondarenko, K Preston, R Li, L Dal Negro, ... Optics letters 36 (1), 4-6, 2011 | 13 | 2011 |
| Planar spin-transfer device with a dynamic polarizer YB Bazaliy, D Olaosebikan, BA Jones Journal of Nanoscience and Nanotechnology 8 (6), 2891-2896, 2008 | 12 | 2008 |
| Non-linear polar material based memory bit-cell with multi-level storage by applying different voltage levels RK Dokania, N Sato, T Gosavi, P Pandey, D Olaosebikan, A Mathuriya, ... US Patent 11,545,204, 2023 | 10 | 2023 |
| 3D integrated ultra high-bandwidth multi-stacked memory RK Dokania, S Manipatruni, A Mathuriya, D Olaosebikan US Patent 11,152,343, 2021 | 10 | 2021 |
| Stacked ferroelectric planar capacitors in a memory bit-cell RK Dokania, N Sato, T Gosavi, P Pandey, D Olaosebikan, A Mathuriya, ... US Patent 11,521,667, 2022 | 6 | 2022 |
| Method of forming stacked ferroelectric non-planar capacitors in a memory bit-cell RK Dokania, N Sato, T Gosavi, P Pandey, D Olaosebikan, A Mathuriya, ... US Patent 11,501,813, 2022 | 6 | 2022 |
| 3D stack of accelerator die and multi-core processor die A Mathuriya, CB Wilkerson, RK Dokania, D Olaosebikan, S Manipatruni US Patent 11,694,940, 2023 | 1 | 2023 |
| Multi-function threshold gate with adaptive threshold and stacked planar paraelectric capacitors A Mathuriya, R Rios, I Odinaka, RK Dokania, D Olaosebikan, ... US Patent 11,664,371, 2023 | 1 | 2023 |
| High-density low voltage multi-element ferroelectric gain memory bit-cell with planar capacitors RK Dokania, N Sato, T Gosavi, P Pandey, D Olaosebikan, A Mathuriya, ... US Patent 11,521,666, 2022 | 1 | 2022 |
| Multi-element gain memory bit-cell having stacked and folded planar memory elements with and without offset RK Dokania, A Mathuriya, D Olaosebikan, T Gosavi, N Sato, ... US Patent 11,955,153, 2024 | | 2024 |
| Multi-element ferroelectric gain memory bit-cell having stacked and folded non-planar capacitors RK Dokania, A Mathuriya, D Olaosebikan, T Gosavi, N Sato, ... US Patent 11,910,618, 2024 | | 2024 |
| Multi-element ferroelectric gain memory bit-cell having stacked and folded planar capacitors RK Dokania, A Mathuriya, D Olaosebikan, T Gosavi, N Sato, ... US Patent 11,903,219, 2024 | | 2024 |
| Method and apparatus to process an instruction for a distributed logic having tightly coupled accelerator core and processor core in a multi-dimensional packaging A Mathuriya, CB Wilkerson, RK Dokania, D Olaosebikan, S Manipatruni US Patent 11,899,613, 2024 | | 2024 |
| Ferroelectric memory chiplet as unified memory in a multi-dimensional packaging A Mathuriya, CB Wilkerson, RK Dokania, D Olaosebikan, S Manipatruni US Patent 11,844,223, 2023 | | 2023 |
| Method and apparatus for cycle-by-cycle clock gating of ferroelectric or paraelectric logic and CMOS based logic A Mathuriya, CB Wilkerson, RK Dokania, D Olaosebikan, S Manipatruni US Patent 11,841,757, 2023 | | 2023 |
| Multi-element ferroelectric gain memory bit-cell having stacked and folded planar capacitors with lateral offset RK Dokania, A Mathuriya, D Olaosebikan, T Gosavi, N Sato, ... US Patent 11,837,268, 2023 | | 2023 |
| Method to segregate logic and memory into separate dies for thermal management in a multi-dimensional packaging A Mathuriya, CB Wilkerson, RK Dokania, D Olaosebikan, S Manipatruni US Patent 11,829,699, 2023 | | 2023 |
| Manganese or scandium doped multi-element non-linear polar material gain memory bit-cell RK Dokania, N Sato, T Gosavi, P Pandey, D Olaosebikan, A Mathuriya, ... US Patent 11,810,608, 2023 | | 2023 |
