Advanced high-κ dielectric stacks with polySi and metal gates: Recent progress and current challenges EP Gusev, V Narayanan, MM Frank IBM Journal of Research and Development 50 (4.5), 387-410, 2006 | 376 | 2006 |
A comparative study of NBTI and PBTI (charge trapping) in SiO2/HfO2 stacks with FUSI, TiN, Re gates S Zafar, Y Kim, V Narayanan, C Cabral, V Paruchuri, B Doris, J Stathis, ... 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 23-25, 2006 | 276 | 2006 |
Switching of ferroelectric polarization in epitaxial BaTiO3 films on silicon without a conducting bottom electrode C Dubourdieu, J Bruley, TM Arruda, A Posadas, J Jordan-Sweet, ... Nature nanotechnology 8 (10), 748, 2013 | 257 | 2013 |
Oxygen vacancies in high dielectric constant oxide-semiconductor films S Guha, V Narayanan Physical review letters 98 (19), 196101, 2007 | 238 | 2007 |
High-/Metal-Gate Fully Depleted SOI CMOS With Single-Silicide Schottky Source/Drain With Sub-30-nm Gate Length MH Khater, Z Zhang, J Cai, C Lavoie, C D'Emic, Q Yang, B Yang, ... IEEE Electron Device Letters 31 (4), 275-277, 2010 | 206 | 2010 |
Comparative study of GaN and AlN nucleation layers and their role in growth of GaN on sapphire by metalorganic chemical vapor deposition K Lorenz, M Gonsalves, W Kim, V Narayanan, S Mahajan Applied Physics Letters 77 (21), 3391-3393, 2000 | 128 | 2000 |
A cost effective 32nm high-K/metal gate CMOS technology for low power applications with single-metal/gate-first process X Chen, S Samavedam, V Narayanan, K Stein, C Hobbs, C Baiocco, W Li, ... 2008 Symposium on VLSI Technology, 88-89, 2008 | 124 | 2008 |
Role of oxygen vacancies in V/sub FB//V/sub t/stability of pFET metals on HfO/sub 2 E Cartier, FR McFeely, V Narayanan, P Jamison, BP Linder, M Copel, ... Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005., 230-231, 2005 | 124 | 2005 |
A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications S Krishnan, U Kwon, N Moumen, MW Stoker, ECT Harley, S Bedell, ... 2011 International Electron Devices Meeting, 28.1. 1-28.1. 4, 2011 | 123 | 2011 |
Origins of threading dislocations in GaN epitaxial layers grown on sapphire by metalorganic chemical vapor deposition V Narayanan, K Lorenz, W Kim, S Mahajan Applied Physics Letters 78 (11), 1544-1546, 2001 | 122 | 2001 |
Examination of flatband and threshold voltage tuning of field effect transistors by dielectric cap layers S Guha, VK Paruchuri, M Copel, V Narayanan, YY Wang, PE Batson, ... Applied physics letters 90 (9), 092902, 2007 | 121 | 2007 |
Fundamental aspects of HfO2-based high-k metal gate stack reliability and implications on tinv-scaling E Cartier, A Kerber, T Ando, MM Frank, K Choi, S Krishnan, B Linder, ... 2011 International Electron Devices Meeting, 18.4. 1-18.4. 4, 2011 | 117 | 2011 |
High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing M Chudzik, B Doris, R Mo, J Sleight, E Cartier, C Dewan, D Park, H Bu, ... 2007 IEEE symposium on VLSI technology, 194-195, 2007 | 110 | 2007 |
Understanding mobility mechanisms in extremely scaled HfO2 (EOT 0.42 nm) using remote interfacial layer scavenging technique and Vt-tuning dipoles with gate … T Ando, MM Frank, K Choi, C Choi, J Bruley, M Hopstaken, M Copel, ... 2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009 | 105 | 2009 |
Epitaxial silicon and germanium on buried insulator heterostructures and devices NA Bojarczuk, M Copel, S Guha, V Narayanan, EJ Preisler, FM Ross, ... Applied physics letters 83 (26), 5443-5445, 2003 | 100 | 2003 |
High-k/metal gate innovations enabling continued CMOS scaling MM Frank 2011 Proceedings of the European Solid-State Device Research Conference …, 2011 | 99 | 2011 |
Band-edge high-performance high-k/metal gate n-MOSFETs using cap layers containing group IIA and IIIB elements with gate-first processing for 45 nm and beyond TC Chen, G Shahidi, S Guha, M Ieong, MP Chudzik, R Jammy, ... 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 178-179, 2006 | 99 | 2006 |
Fundamental understanding and optimization of PBTI in nFETs with SiO2/HfO2 gate stack E Cartier, BP Linder, V Narayanan, VK Paruchuri 2006 International Electron Devices Meeting, 1-4, 2006 | 98 | 2006 |
High-κ/Metal Gate Science and Technology S Guha, V Narayanan Annual Review of Materials Research 39, 181-202, 2009 | 92 | 2009 |
CVD tantalum compounds for FET get electrodes V Narayanan, F McFeely, K Milkove, J Yurkas, M Copel, P Jamison, ... US Patent App. 10/712,575, 2005 | 88 | 2005 |