Daniel R. Johnson
Daniel R. Johnson
Verified email at nvidia.com
Title
Cited by
Cited by
Year
Energy-efficient mechanisms for managing thread context in throughput processors
M Gebhart, DR Johnson, D Tarjan, SW Keckler, WJ Dally, E Lindholm, ...
2011 38th Annual International Symposium on Computer Architecture (ISCA …, 2011
2712011
Rigel: an architecture and scalable programming interface for a 1000-core accelerator
JH Kelm, DR Johnson, MR Johnson, NC Crago, W Tuohy, A Mahesri, ...
ACM SIGARCH Computer Architecture News 37 (3), 140-151, 2009
1782009
Goldmine: Automatic assertion generation using data mining and static analysis
S Vasudevan, D Sheridan, S Patel, D Tcheng, B Tuohy, D Johnson
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
1292010
Scaling the power wall: a path to exascale
O Villa, DR Johnson, M Oconnor, E Bolotin, D Nellans, J Luitjens, ...
SC'14: Proceedings of the International Conference for High Performance …, 2014
1052014
Flexible software profiling of gpu architectures
M Stephenson, SKS Hari, Y Lee, E Ebrahimi, DR Johnson, D Nellans, ...
2015 ACM/IEEE 42nd Annual International Symposium on Computer Architecture …, 2015
852015
Priority-based cache allocation in throughput processors
D Li, M Rhu, DR Johnson, M O'Connor, M Erez, D Burger, DS Fussell, ...
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
842015
Cohesion: a hybrid memory model for accelerators
JH Kelm, DR Johnson, W Tuohy, SS Lumetta, SJ Patel
Proceedings of the 37th annual international symposium on Computer …, 2010
632010
Tradeoffs in designing accelerator architectures for visual computing
A Mahesri, D Johnson, N Crago, SJ Patel
2008 41st IEEE/ACM International Symposium on Microarchitecture, 164-175, 2008
502008
Architecting an energy-efficient DRAM system for GPUs
N Chatterjee, M O’Connor, D Lee, DR Johnson, SW Keckler, M Rhu, ...
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
492017
A hierarchical thread scheduler and register file for energy-efficient throughput processors
M Gebhart, DR Johnson, D Tarjan, SW Keckler, WJ Dally, E Lindholm, ...
ACM Transactions on Computer Systems (TOCS) 30 (2), 1-38, 2012
492012
Rigel: A 1,024-core single-chip accelerator architecture
D Johnson, M Johnson, J Kelm, W Tuohy, S Lumetta, S Patel
IEEE Micro 31 (4), 30-41, 2011
452011
A variable warp size architecture
TG Rogers, DR Johnson, M O'Connor, SW Keckler
ACM SIGARCH Computer Architecture News 43 (3S), 489-501, 2015
382015
Cohesion: An adaptive hybrid memory model for accelerators
JH Kelm, DR Johnson, W Tuohy, SS Lumetta, SJ Patel
IEEE micro 31 (1), 42-55, 2011
332011
A task-centric memory model for scalable accelerator architectures
JH Kelm, DR Johnson, SS Lumetta, MI Frank, SJ Patel
2009 18th International Conference on Parallel Architectures and Compilation …, 2009
312009
Two-level scheduler for multi-threaded processing
WJ Dally, SW Keckler, D Tarjan, JE Lindholm, MA Gebhart, DR Johnson
US Patent 8,732,711, 2014
222014
Pitfalls of orion-based simulation
M Hayenga, DR Johnson, M Lipasti
ORION 35, 40-000, 2010
152010
A patch memory system for image processing and computer vision
J Clemons, CC Cheng, I Frosio, D Johnson, SW Keckler
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
102016
System, method, and computer program product for prioritized access for multithreaded processing
DR Johnson, M Rhu, JM O'Connor, SW Keckler
US Patent App. 14/147,395, 2015
82015
Rigel: A scalable architecture for 1000+ core accelerators
DR Johnson, JH Kelm, NC Crago, MR Johnson, W Tuohy, W Truty, ...
Symposium on Application Accelerators in High Performance Computing, Urbana …, 2009
72009
SChISM: Scalable cache incoherent shared memory
JH Kelm, DR Johnson, A Mahesri, SS Lumetta, M Frank, S Patel
Coordinated Science Laboratory Report no. UILU-ENG-08-2212, CRHC-08-06, 2008
42008
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Articles 1–20