Manali Dhar - Google Scholar

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Co-authors

Dr Chiradeep MukherjeeAssociate Professor,Dept. of CST and CSIT, University of Engineering & ManagementVerified email at uem.edu.in
Dr. Saradindu PandaPrincipal, Dr. Sudhir Chandra Sur Institute of Technology and Sports ComplexVerified email at jisgroup.org

Manali Dhar

Manali Dhar

Verified email at phd.nitdgp.ac.in


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Towards Energy-Efficient Cost-Effective Toffoli Gate Design using Quantum Cellular Automata D Manna, C Mukherjee, A Banerjee, M Dhar, S Panda, B Maji 2023 IEEE Devices for Integrated Circuit (DevIC), 56-60, 2023	2	2023
Predicting Energy Dissipation in QCA-Based Layered-T Gates Under Cell Defects and Polarisation: A Study with Machine-Learning Models M Dhar, C Mukherjee, A Banerjee, D Manna, S Panda, B Maji Journal of Electronic Testing, 1-21, 2024	1	2024
Assessing the Impact of Defects on Energy Dissipation of QCA LT Gate using ML Models M Dhar, C Mukherjee, D Manna, A Banerjee, S Panda, B Maji 2023 IEEE Devices for Integrated Circuit (DevIC), pp. 372-376, 2023	1	2023
EVALUATION OF ATM FUNCTIONING USING VHDL AND FPGA M Dhar, D Roy, T Saha

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Articles 1–4